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910GL Datasheet(PDF) 123 Page - Intel Corporation |
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910GL Datasheet(HTML) 123 Page - Intel Corporation |
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123 / 426 page ![]() DMIBAR Registers—Direct Media Interface (DMI) RCRB R Datasheet 123 7.1.13 DMILSTS—DMI Link Status MMIO Range: DMIBAR Address Offset: 08Ah Default Value: 0001h Access: RO Size: 16 bits This register indicates DMI status. Bit Access & Default Description 15:10 Reserved 9:4 RO 00h Negotiated Link Width (NLW): This field is valid only when the link is in the L0, L0s, or L1 states (after link width negotiation is successfully completed). Negotiated link width is x4 (000100b). All other encodings are reserved. 3:0 RO 1h Link Speed (LS) Link is 2.5 Gb/s. § |
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