STW4811MBHDTSLASHLF datasheet(18/85 Pages) STMICROELECTRONICS

Part #	STW4811MBHDT/LF

Description	Power management for multimedia processors

PDF	85 Pages

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Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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18 / 85 page

Functional description

STw4811M/STw4811N

18/85

CD00131784

Figure 4.

Switching power to sleep timing

In the event of a hardware reset coming from the modem, PON ball set to “0”, all registers

are reset at initial value when PON ball goes back to “1” level.

A software reset from multimedia processor of STw4811, through SW_RESETn ball set to

“0”, resets all registers except

power control register (at address 1E & 1F) and the

configuration 2 register at address 20h.

Main clock oscillator control

REQUEST_MC is an OR output gate between PWREN (coming from multimedia processor)

and TCXO_EN (coming from modem supply), it is synchronized on 32 kHz, except during

power-up where PWREN is masked and considered as high.

REQUEST_MC enabled or disabled the master clock oscillator device.

PDN_regulators

VDDOK

CLK32K

PWREN

Sleep regulators

HPM

Sleep

HPM

MASTER_CLK

Internal_OSC

PDN_intOSC

int_OSC _detect

~100µs

REQUEST_MC

TCXO_EN

“0”

STW4811MBHDT/LF Datasheet(PDF) 18 Page - STMicroelectronics