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STP60N3LH5 Datasheet(PDF) 4 Page - STMicroelectronics |
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STP60N3LH5 Datasheet(HTML) 4 Page - STMicroelectronics |
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4 / 16 page ![]() Electrical characteristics STD60N3LH5, STP60N3LH5, STU60N3LH5 4/16 Doc ID 14079 Rev 3 2 Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 4. Static Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS Drain-source breakdown Voltage ID = 250 µA, VGS= 0 30 V IDSS Zero gate voltage drain current (VGS = 0) VDS = 30 V VDS = 30 V,Tc = 125 °C 1 10 µA µA IGSS Gate body leakage current (VDS = 0) VGS = ± 22 V ± 100 nA VGS(th) Gate threshold voltage VDS= VGS, ID = 250 µA 1 1.8 3 V RDS(on) Static drain-source on resistance VGS= 10 V, ID= 24 A SMD version 0.0072 0.008 Ω VGS= 10 V, ID= 24 A 0.0076 0.0084 Ω VGS= 5 V, ID= 24 A SMD version 0.0088 0.011 Ω VGS= 5 V, ID= 24 A 0.0092 0.0114 Ω Table 5. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Coss Crss Input capacitance Output capacitance Reverse transfer capacitance VDS =25 V, f=1 MHz, VGS=0 - 1350 265 32 - pF pF pF Qg Qgs Qgd Total gate charge Gate-source charge Gate-drain charge VDD=15 V, ID = 48 A VGS =5 V (Figure 14) - 8.8 4.7 2.2 - nC nC nC Qgs1 Qgs2 Pre Vth gate-to-source charge Post Vth gate-to-source charge VDD=15 V, ID = 48 A VGS =5 V (Figure 19) - 2.2 2.5 - nC nC RG Gate input resistance f=1 MHz gate bias Bias= 0 test signal level=20 mV open drain -1.1 - Ω |
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