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MPC8572ECLPXATLD Datasheet(PDF) 110 Page - Freescale Semiconductor, Inc

Part # MPC8572ECLPXATLD
Description  MPC8572E PowerQUICC III Integrated Processor Hardware Specifications
PDF  140 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8572ECLPXATLD Datasheet(HTML) 110 Page - Freescale Semiconductor, Inc

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MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4
110
Freescale Semiconductor
Package Description
SD2_TX[0]
SGMII Tx Data eTSEC1
AD26
O
XVDD_SR
DS2
—
SD2_TX[3:0]
Transmit Data (negative)
AH27, AG25, AE25,
AD27
OXVDD_SR
DS2
—
SD2_PLL_TPD
PLL Test Point Digital
AH32
O
XVDD_SR
DS2
17
SD2_REF_CLK
PLL Reference Clock
AG32
I
XVDD_SR
DS2
—
SD2_REF_CLK
PLL Reference Clock
Complement
AG31
I
XVDD_SR
DS2
—
Reserved
—
AF26, AF27
—
—
28
General-Purpose Input/Output
GPINOUT[0:7]
General Purpose Input / Output B27, A28, B31, A32,
B30, A31, B28, B29
I/O
BVDD
—
System Control
HRESET
Hard Reset
AC31
I
OVDD
—
HRESET_REQ
Hard Reset Request
L23
O
OVDD
21
SRESET
Soft Reset
P24
I
OVDD
—
CKSTP_IN0
Checkstop In Processor 0
N26
I
OVDD
—
CKSTP_IN1
Checkstop In Processor 1
N25
I
OVDD
—
CKSTP_OUT0
Checkstop Out Processor 0
U29
O
OVDD
2, 4
CKSTP_OUT1
Checkstop Out Processor 1
T25
O
OVDD
2, 4
Debug
TRIG_IN
Trigger In
P26
I
OVDD
—
TRIG_OUT/READY_P0/QUIES
CE
Trigger Out / Ready Processor
0/ Quiesce
P25
O
OVDD
21
READY_P1
Ready Processor 1
N28
O
OVDD
5, 9
MSRCID[0:1]
Memory Debug Source Port ID
U27, T29
O
OVDD
5, 9, 30
MSRCID[2:4]
Memory Debug Source Port ID
U28, W24, W28
O
OVDD
21
MDVAL
Memory Debug Data Valid
V26
O
OVDD
2, 21
CLK_OUT
Clock Out
U32
O
OVDD
11
Clock
RTC
Real Time Clock
V25
I
OVDD
—
SYSCLK
System Clock
Y32
I
OVDD
—
Table 75. MPC8572E Pinout Listing (continued)
Signal
Signal Name
Package Pin Number
Pin Type
Power
Supply
Notes



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