P89LPC9331FDH datasheet(33/94 Pages) NXP

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P89LPC9331_9341_9351_9361

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Product data sheet

Rev. 5 — 10 January 2011

33 of 94

NXP Semiconductors

P89LPC9331/9341/9351/9361

8-bit microcontroller with accelerated two-clock 80C51 core

7.13 Memory organization

The various P89LPC9331/9341/9351/9361 memory spaces are as follows:

• DATA

128 bytes of internal data memory space (00H:7FH) accessed via direct or indirect

addressing, using instructions other than MOVX and MOVC. All or part of the Stack

may be in this area.

• IDATA

Indirect Data. 256 bytes of internal data memory space (00H:FFH) accessed via

indirect addressing using instructions other than MOVX and MOVC. All or part of the

Stack may be in this area. This area includes the DATA area and the 128 bytes

immediately above it.

• SFR

Special Function Registers. Selected CPU registers and peripheral control and status

registers, accessible only via direct addressing.

• XDATA (P89LPC9351/9361)

‘External’ Data or Auxiliary RAM. Duplicates the classic 80C51 64 kB memory space

addressed via the MOVX instruction using the DPTR, R0, or R1. All or part of this

space could be implemented on-chip. The P89LPC9351/9361 has 512 bytes of

on-chip XDATA memory, plus extended SFRs located in XDATA.

• CODE

64 kB of Code memory space, accessed as part of program execution and via the

MOVC instruction. The P89LPC9331/9341/9351/9361 has 4 kB/8 kB/16 kB of on-chip

Code memory.

The P89LPC9351/9361 also has 512 bytes of on-chip data EEPROM that is accessed via

SFRs (see Section 7.14).

7.14 Data RAM arrangement

The 768 bytes of on-chip RAM are organized as shown in Table 8.

7.15 Interrupts

The P89LPC9331/9341/9351/9361 uses a four priority level interrupt structure. This

allows great flexibility in controlling the handling of the many interrupt sources. The

P89LPC9331/9341/9351/9361 supports 15 interrupt sources: external interrupts 0 and 1,

timers 0 and 1, serial port TX, serial port RX, combined serial port RX/TX, brownout

detect, watchdog/RTC, I2C-bus, keyboard, comparators 1 and 2, SPI, CCU, data

EEPROM write/ADC completion.

Table 8.

On-chip data memory usages

Type

Data RAM

Size (bytes)

DATA

Memory that can be addressed directly and indirectly

128

IDATA

Memory that can be addressed indirectly

256

XDATA

Auxiliary (External Data) on-chip memory that is accessed

using the MOVX instructions (P89LPC9351/9361)

512

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