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CMX625P4 Datasheet(PDF) 5 Page - CML Microcircuits

Part # CMX625P4
Description  ISDN TA POTS Interface
PDF  34 Pages
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Manufacturer  CMLMICRO [CML Microcircuits]
Direct Link  http://www.cmlmicro.com
Logo CMLMICRO - CML Microcircuits

CMX625P4 Datasheet(HTML) 5 Page - CML Microcircuits

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ISDN TA POTS Interface
CMX625
 2001 Consumer Microcircuits Limited
5
D/625/2
CMX625
D5/P4
Signal
Description
Pin No.
Name
Type
12
VSS
Power
The negative supply rail (ground).
13
RXP
I/P
The non-inverting input of the receive op-amp.
14
RXN
I/P
The inverting input of the receive op-amp.
15
RXO
O/P
The output of the receive op-amp.
16
VBIAS
O/P
An internally generated bias voltage of VDD/2, except
when the device has been reset, VBIAS will discharge to
VSS. It should be decoupled to VSS by a capacitor
mounted close to the device pins.
17
TONEFSK
O/P
The sinewave output of the Tones and FSK signal
generators.
18
TXO
O/P
The output of the buffer amplifier.
19
TXN
I/P
The inverting input to the buffer amplifier.
20
TXON
O/P
The inverted output of the buffer amplifier.
21
DAC OUT
O/P
The output from the digital-to-analogue converter.
22
RING
O/P
The square, trapezoidal and sinusoidal wave output from
the Ringing Signal Generator.
23
SPM
O/P
The sinewave output of the SPM signal generator.
24
VDD
Power
The positive supply rail. Levels and thresholds within the
device are proportional to this voltage. It should be
decoupled to VSS by a capacitor mounted close to the
device pins.
Notes:
I/P
=
Input
O/P =
Output
BI
=
Bi-directional
N/C =
No (external) Connection
This device is capable of detecting and decoding small amplitude signals. To achieve this VDD
and VBIAS decoupling and protecting the receive path from extraneous in-band signals are very
important. It is recommended that the printed circuit board is laid out with a ground plane in the
CMX625 area to provide a low impedance connection between the VSS pin and the VDD and VBIAS
decoupling capacitors.



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