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STM8L151C4U6 Datasheet(PDF) 93 Page - STMicroelectronics |
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STM8L151C4U6 Datasheet(HTML) 93 Page - STMicroelectronics |
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93 / 122 page ![]() STM8L151xx, STM8L152xx Electrical parameters Doc ID 15962 Rev 5 93/122 Figure 34. SPI1 timing diagram - slave mode and CPHA=0 Figure 35. SPI1 timing diagram - slave mode and CPHA=1(1) 1. Measurement points are done at CMOS levels: 0.3VDD and 0.7VDD. ai14134 CPHA= 0 MOSI INPUT MISO OUT P UT CPHA= 0 MS B O UT MSB IN BI T6 OUT LSB IN LSB OUT CPOL=0 CPOL=1 BI T1 IN NSS input tSU(NSS) tc(SCK) th(NSS) ta(SO) tw(SCKH) tw(SCKL) tv(SO) th(SO) tr(SCK) tf(SCK) tdis(SO) tsu(SI) th(SI) ai14135 CPHA=1 MOSI INPUT MISO OUT P UT CPHA=1 MS B O UT MSB IN BI T6 OUT LSB IN LSB OUT CPOL=0 CPOL=1 BI T1 IN tSU(NSS) tc(SCK) th(NSS) ta(SO) tw(SCKH) tw(SCKL) tv(SO) th(SO) tr(SCK) tf(SCK) tdis(SO) tsu(SI) th(SI) NSS input |
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