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MPC8308 Datasheet(PDF) 14 Page - Freescale Semiconductor, Inc |
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MPC8308 Datasheet(HTML) 14 Page - Freescale Semiconductor, Inc |
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14 / 90 page ![]() MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 2 14 Freescale Semiconductor DDR2 SDRAM Figure 5 shows the DDR2 SDRAM output timing for the MCK to MDQS skew measurement (tDDKHMH). Figure 5. Timing Diagram for tDDKHMH Figure 6 shows the DDR2 SDRAM output timing diagram. Figure 6. DDR2 SDRAM Output Timing Diagram MDQS MCK[n] MCK[n] tMCK tDDKHMHmax) = 0.6 ns tDDKHMH(min) = –0.6 ns MDQS ADDR/CMD tDDKHAS,tDDKHCS tDDKHMH tDDKLDS tDDKHDS MDQ[x]/ MDQS[n] MCK[n] MCK[n] tMCK tDDKLDX tDDKHDX D1 D0 tDDKHAX,tDDKHCX Write A0 NOOP tDDKHME tDDKHMP MECC[x] |
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