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LC651154N Datasheet(PDF) 21 Page - Sanyo Semicon Device |
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LC651154N Datasheet(HTML) 21 Page - Sanyo Semicon Device |
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21 / 39 page ![]() No. 6278-21/39 LC651154N, 651154F, 651154L, 651152N, 651152F, 651152L LC651154F, 651152F Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V Parameter Symbol Conditions Applicable pins and notes Ratings Unit Maximum supply voltage VDD max VDD –0.3 to +7.0 Output voltage VO OSC2 Allowed up to the generated voltage. Input voltage VI (1) OSC1 *1 –0.3 to VDD + 0.3 V VI (2) TEST, RES, AV+, AV– –0.3 to VDD + 0.3 VIO (1) PC0 to PC3, PD0 to PD3, PE0, 1, PF0 to PF3 Open-drain specification ports –0.3 to +15 I/O voltage VIO (2) PC0 to PC3, PD0 to PD3, PE0, 1, PF0 to PF3 Pull-up resistor specification ports –0.3 to VDD + 0.3 VIO (3) PA0 to PA3, PG0 to PG3 –0.3 to VDD + 0.3 Peak output current IOP I/O ports –2 to +20 IOA Per single pin, averaged over 100 ms I/O ports –2 to +20 The total current for PC0 to PC3, PC0 to PC3 ∑IOA (1) PD0 to PD3, and PE0 and PE1 *2 PD0 to PD3 –15 to +100 mA Average output current PE0 and PE1 The total current for PF0 to PF3, PG0 to PG3, PF0 to PF3 ∑IOA (2) and PA0 to PA3 (See note 2.) *2 PG0 to PG3 –15 to +100 PA0 to PA3 Pd max (1) Ta = –40 to +85°C (DIP package) 310 Allowable power dissipation Pd max (2) Ta = –40 to +85°C (MFP package) 220 mW Pd max (3) Ta = –40 to +85°C (SSOP package) 160 Operating temperature Topr –40 to +85 °C Storage temperature Tstg –55 to +125 Parameter Symbol Conditions Applicable pins and notes Ratings Unit min typ max Operating supply voltage VDD VDD 2.5 6.0 Standby supply voltage VST RAM and register values retained*3 VDD 1.8 6.0 VIH (1) Output n-channel transistors off Ports C, D, E, and F with 0.7 VDD 13.5 open-drain specifications VIH (2) Output n-channel transistors off Ports C, D, E, and F with 0.7 VDD VDD pull-up resistor specifications VIH (3) Output n-channel transistors off Port A, G 0.7 VDD VDD V The INT, SCK, and SI High-level input voltage VIH (4) Output n-channel transistors off pins with open-drain 0.8 VDD 13.5 specifications The INT, SCK, and SI VIH (5) Output n-channel transistors off pins with pull-up resistor 0.8 VDD VDD specifications VIH (6) VDD = 1.8 to 6.0 V RES 0.8 VDD VDD VIH (7) External clock specifications OSC1 0.8 VDD VDD Allowable Operating Ranges at Ta = –40 to +85°C, VSS = 0 V, VDD = 2.5 to 6.0 V (Unless otherwise specified.) Continued on next page. |
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