SC508 datasheet(22/32 Pages) SEMTECH

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SC508/SC508A

Applications Information (continued)

the ENL pin low (to AGND) will turn off the LDO and the

LDO switch-over MOSFET, but the switcher will continue

operating. V

OUT will feed into the LDO output and the

VDDA/VDDP supplies through the internal parasitic diode.

This can potentially damage the device, and also prevents

the switcher from shutting off until the VDDA supply drops

below the VDDA UVLO threshold. For these applications a

dedicated logic signal is required to drive EN low and

disable the switcher. This signal can be combined with

the ENL signal if needed, as long as the EN pin does not

exceed Absolute Maximum Ratings.

LDO Usage at Low Input Voltage

Applications requiring steady-state or transient operation

at low input voltages (V

IN below 6.5V) may use the internal

LDO to bias the VDDA/VDDP pins within limitations. There

are limitations to both startup and normal operation as

explained below.

When starting up using the internal LDO, switcher opera-

tion is inhibited until the LDO output reaches 4.5V. During

this time, the LDO start-up is implemented using a current

source. At low V

IN it is important to not apply an external

load to the LDO, in order to allow the LDO output to reach

the 4.5V threshold and allow switching to begin.

Once switching begins, LDO operation transitions from

current-source operation to voltage regulation. The

minimum operating V

IN is then limited by the RDSON of the

internal LDO MOSFET. The current required to power the

SC508 and external MOSFET gates causes a voltage drop

from the V

IN pin to the VLDO pin. The VLDO pin must stay

above 4.5V, otherwise the LDO control will revert back to

current-source operation, causing more voltage drop at

the LDO output. The RDS

ON of the LDO mosfet at low VIN is

typically 24 ohms at 25°C.

Design Procedure

When designing a switch mode supply the input voltage

range, load current, switching frequency, and inductor

ripple current must be specified.

The maximum input voltage (V

INMAX) is the highest specified

input voltage. The minimum input voltage ( V

INMIN) is deter-

mined by the lowest input voltage including the voltage

drops due to connectors, fuses, switches, and PCB traces.

The following parameters define the design.

Nominal output voltage (V

OUT)

Static or DC output tolerance

Transient response

Maximum load current (I

OUT)

There are two values of load current to evaluate — con-

tinuous load current and peak load current. Continuous

load current relates to thermal stresses which drive the

selection of the inductor and input capacitors. Peak load

current determines instantaneous component stresses and

filtering requirements such as inductor saturation, output

capacitors, and design of the current limit circuit.

The following values are used in this design.

IN = 28V + 10%

OUT = 1.8V + 4%

SW = 220kHz

Load = 8A maximum

Frequency Selection

Selection of the switching frequency requires making a

trade-off between the size and cost of the external filter

components (inductor and output capacitor) and the

power conversion efficiency.

The desired switching frequency is 220kHz.

A resistor, R

TON is used to program the on-time (indirectly

setting the frequency) using the following equation.

OUT

TON

28pF

)

(

To select R

TON, use the maximum value for VIN, and for TON

use the value associated with maximum V

IN.

INMAX

OUT

ON = 266 ns at 30.8VIN, 1.8VOUT, 220kHz

Substituting for R

TON results in the following solution.

TON = 156kΩ, use RTON = 154kΩ

•

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