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DTC114ESA Datasheet(PDF) 1 Page - WILLAS ELECTRONIC CORP |
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DTC114ESA Datasheet(HTML) 1 Page - WILLAS ELECTRONIC CORP |
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1 / 3 page ![]() Digital Transistors (Built-in Resistors) DTC114EM/DTC114EE/DTC114EUA DTC114EKA /DTC114ECA/DTC114ESA ·Equivalent Circuit DIGITAL TRANSISTOR (NPN) FEATURES Built-in bias resistors enable the configuration of an inverter circuit without connecting external input resistors(see equivalent circuit) The bias resistors consist of thin-film resistors with complete isolation to allow positive biasing of the input.They also have the advantage of almost completely eliminating parasitic effects Only the on/off conditions need to be set for operation, making device design easy PIN CONNENCTIONS and MARKING DTC114EM SOT-723 1. IN 2. GND 3. OUT MARKING:24 DTC114EE SOT-523 1. IN 2. GND 3. OUT MARKING:24 DTC114EUA SOT-323 1. IN 2. GND 3. OUT MARKING:24 DTC114EKA SOT-23-3L 1. IN 2. GND 3. OUT MARKING:24 DTC114ECA SOT-23 1. IN 2. GND 3. OUT MARKING:24 DTC114ESA TO-92S 1. GND 2. OUT 3. IN 201 2-05 WILLAS ELECTRONIC CORP. Features Batch process design, excellent power dissipation offers better reverse leakage current and thermal resistance. Low profile surface mounted application in order to optimize board space. Low power loss, high efficiency. High current capability, very low forward voltage drop. High surge capability. Guardring for overvoltage protection. Very tiny plastic SMD package. Ultra high-speed switching. Silicon epitaxial planar chip, metal silicon junction. • • • • • • • • • Mechanical data Epoxy : UL94-V0 rated flame retardant • Case : Molded plastic, SOD-323 -L • Terminals :Plated terminals, solderable per MIL-STD-750, Method 2026 • Polarity : Indicated by cathode band • Mounting Position : Any • Weight : Approximated 0.008 gram • Package outline 1.0A Surface Mount Schottky Barrier Rectifiers - 20V-40V SL12-N THRU SL14-N Maximum ratings (AT T =25 A oC unless otherwise noted) PARAMETER CONDITIONS Forward rectified current Forward surge current Reverse current Thermal resistance Diode junction capacitance Storage temperature See Fig.2 8.3ms single half sine-wave superimposed on rate load (JEDEC methode) f=1MHz and applied 4V DC reverse voltage Symbol MIN. TYP. MAX. UNIT I O I FSM I R R θJA C J T STG A A mA OC/W OC pF 1.0 30 0.5 +175 -65 O V = V T = 25 C R RRM J Junction to ambient 130 SL12-N SL13-N SL14-N 20 30 40 14 21 28 20 30 40 -55 to +100 SYMBOLS V RRM (V) V RMS V R (V) (V) *1 *2 *3 *1 Repetitive peak reverse voltage *2 RMS voltage *3 Continuous reverse voltage *4 Maximum forward voltage@I =1.0A F V F (V) *4 0.40 0.40 0.38 O ( C) Operating temperature T , J 0.012(0.3) Typ. 0.016(0.4) Typ. 0.016(0.4) Typ. 0.106 (2.7) 0.091 (2.3) 0.057 (1.45) 0.041 (1.05) 0.047 (1.2) 0.031 (0.8) Dimensions in inches and (millimeters) SOD-323 -L Low VF Chip Schottky Barrier Diodes WILLAS ELECTRONIC CORP. 201 .1 Halogen free product for packing code suffix "H" RoHS product for packing code suffix "G" WILLAS |
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