www.austriamicrosystems.com/AS8650

Revision 2.0

21 - 46

AS8650A

Datasheet - Detailed Descr i p ti on

The power initialization sequence diagram is shown in Figure 6.



After activating the power supply on VSUP pin, the VSUP_POR_RESET flag becomes inactive (high) while the voltage exceeds the

VSUP_POR threshold.



The DCDC output voltage V5V exceeds the V5V_POKTH thresholds after the DCDC settling time and the first voltage regulator (LDO1) will

be activated with the V5V_POK set.



If the voltage output at LDO1 (set to 2.5V on power-up) reaches the VLDO1_POKTH threshold, the PORN_2_OTP flag is set and OTP

register setting for the LDO1 is read. Consequently the output voltage will be regulated to the actual OTP settings.



The initialization phase of the device is terminated after the preset output voltage level threshold is exceeded and the reset timeout is

expired.



After entering Standby mode the host controller can switch the device in any operation mode through the I²C or SPI interface.

Figure 6. Initialization Sequence

VSUP

VSUP_POR_RESET

PORN_2_OTP

LOAD_OTP_IN_

PREREG

RESET

VLDO1_POKTH

VSUP_POR

Tres = Reset Timeout

6 Cycles of

RC- Oscillator

V5V

V5V_POK

VLDO1

VLDO1_RESET

STANDBY

MODE

INITIALIZATION

DEVICE

STATE

NORMAL MODE

STARTUP

WATCHDOG

VLDO2

VLDO3

INTN

V5V_POKTH

VLDO2_POKTH

VLDO3_POKTH

Tstno = Standby to Normal mode time

Start-up watchdog

disabled by default

VLDO1_POKTH

Host Command

Tpost = Power-up to Standby mode time