LTC3589 datasheet(16/50 Pages) LINER

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LTC3589/LTC3589-1/

LTC3589-2

3589fe

OPERATION

INTRODUCTION

The LTC3589 is a complete power management solution

for portable microprocessors and peripheral devices. It

generates a total of eight voltage rails for supplying power

to the processor core, SDRAM, system memory, PC cards,

always-on real-time clock and HDD functions. Supplying

the voltage rails are an always-on low quiescent current

25mA LDO, one 1.6A and two 1A (1.2A for LTC3589-1/

LTC3589-2) step-down regulators, a 1.2A buck-boost

regulator, and three 250mA low dropout regulators. Sup-

porting the multiple regulators is a highly conﬁgurable

power-on sequencing capability, dynamic voltage slewing

DAC output voltage control, a pushbutton interface con-

troller, regulator control via an I2C interface, and extensive

status and interrupt outputs.

The LTC3589 operates over an input supply range of 2.7V

to 5.5V. The input supplies for the 250mA LDO regulators

may operate as low as 1.7V to limit power loss at low

output voltages.

The always-on LDO1 provides a resistor programmable

output voltage as low as 0.8V and is capable of supplying

25mA. With only the always-on LDO active the LTC3589

draws just 8μA (typical). Always-on LDO1 will continue to

operate with VIN levels as low as 2.0V (typical) to maintain

memory and RTC function as long as possible.

Each of the 250mA LDO regulators has unique output

voltage conﬁgurations. LDO3 has a ﬁxed 1.8V (2.8V for

LTC3589-1/LTC3589-2) output. LDO4 has four output

levels selectable via the I2C interface. Its possible outputs

are 1.8V, 2.5V, 2.8V, and 3.3V (1.2V, 1.8V, 2.5V, 3.2V for

LTC3589-1/ LTC3589-2). LDO2 has a dynamically slewing

DAC set point reference and an external feedback pin to

set the output voltage range with a resistive divider. Each

LDO draws 60μA (typical) quiescent current.

The LTC3589 includes three internally compensated

constant frequency current mode step-down switching

regulators two capable of supplying 1A of output cur-

rent and one capable of supplying 1.6A. The LTC3589-1/

LTC3589-2 step-down regulators can supply 1.2A, 1.2A,

and 1.6A. Step-down regulator switching frequencies of

2.25MHz or 1.125MHz are independently selected for each

step-down regulator using the I2C command registers.

The power-on default frequency is 2.25MHz. Each of the

step-down regulators have dynamically slewing DAC input

references and external feedback pins to set output voltage

range. The step-down regulators three operating modes,

pulse-skipping, burst, or forced continuous, are set using

the I2C interface. In pulse-skipping mode the regulator

will support 100% duty cycle. For best efﬁciency at low

output loads select Burst Mode operation. Forced continu-

ous mode minimizes output voltage ripple at light loads.

The 4-switch buck-boost DC/DC voltage mode converter

generates a user-programmable output voltage rail from

1.8V to 5V. Utilizing a proprietary switching algorithm,

the buck-boost converter maintains high efﬁciency and

low noise operation with input voltages that are above,

below or equal to the required output rail. The buck-boost

error ampliﬁer uses a ﬁxed 0.8V reference and the output

voltage is set by an external resistor divider. Burst Mode

operation is enabled through the I2C control registers. No

external compensation components are required for the

buck-boost converter.

The reference inputs for the three step-down regulators

and LDO2 are 5-bit D to A converters with up-down ramp-

ing at selectable slew rates. The slew endpoint voltages

and select bits are stored in I2C registers for each DAC.

A select bit in the I2C command registers chooses which

slew rates from 0.88mV/μs to 7mV/μs are selectable in

the I2C register. Each of the four DACs has independent

voltage, voltage select, and slew rate control registers.

The LTC3589 is equipped with a pushbutton control circuit

that will activate the WAKE output, indicate pushbutton

status via the PBSTAT pin, and initiate a hard reset shut-

down of the regulators. Grounding the ON pin with the

pushbutton for 400ms will force the WAKE pin to release

HIGH. The WAKE pin output can be tied to the enable pin

of the ﬁrst regulator in a power-on sequence. Once in the

power-on state, subsequent pushes of the button longer

than 50ms are mirrored by the PBSTAT output. Holding

ON LOW for ﬁve seconds disables all the regulators, pulls

down the WAKE pin, and pulls down RSTO for one second

to indicate to the processor that a hard reset occurred. All

regulator enables and pushbutton inputs are inhibited for

one second following the hard reset.

LTC3589 Datasheet(PDF) 16 Page - Linear Technology

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