SP8542/8544DS/01

SP8542/8544 Two and Four Channel 12-Bit Multiplexed Sampling ADC's

© Copyright 2000 Sipex Corporation

5

SP8542 PIN ASSIGNMENTS

Pin 1-N.C.-No Connection

Pin 2-CH0-Analog Mux Input 0

Pin 3-CH1-Analog Mux Input 1

Pin 4-AGND-Analog Ground

Pin 5-VSS Digital Ground

Pin 6-SCLK-Serial Clock Input

Pin 7-DOUT Digital Data Output

Pin 8-DIN Mux Channel Selection Input

Pin 9-Status

Pin 10-CS-Chip Select Bar Input, High

Deselects chip, Low Selects chip

Pin 11-SD-Shutdown Input, logic low = power

up, logic high = powerdown

Pin 12-VDD Digital +5V supply

Pin 13-VDA Analog +5V supply

Pin 14-OffADJ External Offset Adjust

Pin 15-Refout-Voltage Reference Output

Pin 16-GAINADJ-External Gain Adjustment

GAIN ADJUST

REF OUT

OFFSET ADJ.

SD

CS

STATUS

1

2

3

4

5

6

7

8

N.C.

CH0

CH1

AGND

SCLK

DIN

16

15

14

13

12

11

10

9

SP8542

SP8544 PIN ASSIGNMENTS

Pin 1-N.C.-No Connection

Pin 2-CH0-Analog Mux Input 0

Pin 3-CH1-Analog Mux Input 1

Pin 4-CH2-Analog Mux Input 2

Pin 5-CH3-Analog Mux Input 3

Pin 6-AGND-Analog Ground

Pin 7-VSS Digital Ground

Pin 8-SCLK-Serial Clock Input

Pin 9-DOUT Digital Data Output

Pin 10-DIN Mux Channel Selection Input

Pin 11-Status

Pin 12-CS-Chip Select Bar Input, High

Deselects chip, Low Selects chip

Pin 13-SD-Shutdown Input, logic low = power

up, logic high = powerdown

Pin 14-VDD Digital +5V supply

Pin 15-VDA Analog +5V supply

Pin 16-OffADJ External Offset Adjust

Pin 17-Refout-Voltage Reference Output

Pin 18-GAINADJ-External Gain Adjustment

GAIN ADJUST

REF OUT

OFFSET ADJ.

SD

CS

STATUS

DIN

1

2

3

4

5

6

7

8

N.C.

CH0

CH1

CH2

CH3

AGND

SCLK

9

18

17

16

15

14

13

12

11

10

SP8544

SP 8542 Channel Selection

Truth Table

MA0

Channel Selection

0

CH0

1

CH1

SP 8544 Channel Selection

Truth Table

MA1

MA0

Channel Selection

0

0

CH0

0

1

CH1

1

0

CH2

1

1

CH3