TNETA1585PCM datasheet(26/32 Pages) TI1

Part #	TNETA1585PCM

Description	ATM TRAFFIC MANAGEMENT SCHEDULER DEVICE WITH RECEIVE UTOPIA AND COPROCESSOR INTERFACES

PDF	32 Pages

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Manufacturer	TI1 [Texas Instruments]

Direct Link	http://www.ti.com

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26 / 32 page

TNETA1585

ATM TRAFFIC MANAGEMENT SCHEDULER DEVICE

WITH RECEIVE UTOPIA AND COPROCESSOR INTERFACES

SDNS041A – NOVEMBER 1996 – REVISED JULY 1998

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

timing requirements (see Figure 9)

slave interface – write operation

NO.

MIN

MAX

UNIT

tsu(SCAD)

Setup time, SCAD5–SCAD0 valid before CLOCK

↑

tsu(SCDATA)

Setup time, SCDATA31–SCDATA0 valid before CLOCK

↓

tsu(SCWE)

Setup time, SCWE low before CLOCK

↑

tsu(SCSEL)

Setup time, SCSEL low before CLOCK

↑

tsu(SCOE)

Setup time, SCOE high before CLOCK

↓

th(SCAD)

Hold time, SCAD5–SCAD0 valid after CLOCK

↑

th(SCDATA)

Hold time, SCDATA31–SCDATA0 valid after CLOCK

↓

th(SCWE)

Hold time, SCWE low after CLOCK

↑

th(SCSEL)

Hold time, SCSEL low after CLOCK

↑

th(SCOE)

Hold time, SCOE high after CLOCK

↓

SCDATA31–

SCDATA0

(input)

SCOE

(input)

SCSEL

(input)

Valid

SCAD5–

SCAD0

(input)

Valid

CLOCK

(input)

SCWE

(input)

Figure 9. Slave Interface – Write Operation

TNETA1585PCM Datasheet(PDF) 26 Page - Texas Instruments

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