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WM8940CGEFL/V Datasheet(PDF) 45 Page - Wolfson Microelectronics plc |
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WM8940CGEFL/V Datasheet(HTML) 45 Page - Wolfson Microelectronics plc |
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45 / 91 page  Production Data WM8940 w PD, Rev 4.3, November 2011 45 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R24 DAC digital limiter control 1 8 LIMEN 0 Enable the DAC digital limiter: 0=disabled 1=enabled 7:4 LIMDCY 0011 Limiter Decay time (per 6dB gain change) for 44.1kHz sampling. Note that these will scale with sample rate: 0000=750us 0001=1.5ms 0010=3ms 0011=6ms 0100=12ms 0101=24ms 0110=48ms 0111=96ms 1000=192ms 1001=384ms 1010=768ms 1011 to 1111=1.536s 3:0 LIMATK 0010 Limiter Attack time (per 6dB gain change) for 44.1kHz sampling. Note that these will scale with sample rate. 0000=94us 0001=188s 0010=375us 0011=750us 0100=1.5ms 0101=3ms 0110=6ms 0111=12ms 1000=24ms 1001=48ms 1010=96ms 1011 to 1111=192ms R25 DAC digital limiter control 2 6:4 LIMLVL 000 Programmable signal threshold level (determines level at which the limiter starts to operate) 000=-1dB 001=-2dB 010=-3dB 011=-4dB 100=-5dB 101 to 111=-6dB |
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