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LCX026AL

Input Signals

Item

H shift register input voltage

HST, HCK1, HCK2, RGT

(Low)

(High)

(Low)

(High)

VHIL

VHIH

VVIL

VVIH

VVC

Vsig

Vcom

Vpsig

–0.5

4.5

–0.5

4.5

6.8

VVC – 4.5

VVC – 0.5

VVC ± 4.3

0.0

5.0

0.0

5.0

7.0

7.0

VVC – 0.4

VVC ± 4.5

0.4

5.5

0.4

5.5

7.2

VVC + 4.5

VVC – 0.3

VVC ± 4.7

V

V

V

V

V

V

V

V

V shift register input voltage

MODE1, MODE2, MODE3,

BLK, VST, VCK, PCG,

ENB, DWN

Video signal center voltage

Uniformity improvement signal

Symbol

Min.

Typ.

Max.

Unit

construction to use. In this case, use the voltage of which has maximum contrast as typical value.

When the typical value is lowered, the maximum and minimum values may lower.

symmetrical to VVC. Also, the rising and falling of PSIG are synchronized with the rising of PCG pulse, and

the rise time trPSIG and fall time tfPSIG are suppressed within 800ns (as shown in a diagram below).

The optimum input voltage of PSIG may be changed according as drive conditions of the drive side.

Level Conversion Circuit

The LCX026AL has a built-in level conversion circuit in the clock input unit on the panel. The input signal level

trPSIG

tfPSIG

VVC

PSIG

PCG

90%

10%

Input waveform of uniformity improvement signal PSIG