PWM DC Motor Regulator – Data Sheet

AS8410

Rev. 1.0, December 2000

4.1.2

Regulator Characteristic, PWM Generator

The external set value, incoming at pin IN, is transformed in both modes (OM1 and OM2) to the

internal dc voltage in the range 0 … 2 V corresponding to 0 % … 100 % set value.

A function generator transforms then this set value voltage to a function with two different gradi-

ents:

a) The input range 0 % … 50 % is transformed to the output range 0 % … 20 %

b) The input range 50 % … 100 % is transformed to the output range

In this way the resolution of the set value input is higher in the first half of the input range (low

motor currents: 0% … 20%) than in the second half one (higher motor currents 20% … 100%).

A special behaviour is implemented for very low input set values in the following way for the

operating mode 1 (OM1) and operating mode 2 (OM2):

a) OM2: For low input set values (< 10%) the system is put in sleep mode

Condition: (P00 or P10) and (/MODE)

b) OM1: For very low input set values (0 < set value < 5%, duty ratio nearly or

equal 0 is taken as input failure: short circuit of the input line to ground),

the internal set value is put to 100 %

àsecurity mode: The motor is

permanently switched on and so cooling the heating engine.

For input set values in the range 5% < set value < 10% the system is put in a

special sleep mode.

The difference of the set value output of this block and the internal control value coming from

the motor measurement unit is controlling the PWM generator (voltage at the pin Cint1) and so

generating the duty ratio of the 20 kHz PWM signal what controls the power FET driver.

The time constant of this regulation loop can be chosen in very width ranges by the external

capacitor connected at the pin Cint1.

4.1.3

Power FET driver, Slew rate regulation

The Power FET driver is controlled in two different ways:

First by the digital output of the PWM generator to realise the duty ratio of the motor drive and

so to regulate the motor current in the closed loop.

Second by the analogue motor voltage to regulate the slew rate during the rising and falling

edge of the motor voltage. This control is executed by an external feedback of the motor voltage

to the pins SRC1 (rising edge) and SRC2 (falling edge). The two currents incoming to these

pins are amplified by a factor of about 1000 and drive then the gate of the external power FET.

The supply voltage of this driver is about 10 V higher than the Vbat (n-channel power FET) and

is delivered by the on chip charge pump at pin Vpump.

Symbol

Parameter

min

typ

max

Unit

Note

Vpump

Pumped supply voltage

11

Vbat+10

43,00

V

0.70

0.90

V

1

Input current into the pins SRC1 or SRC2

400

µA

Output current pin OUT

-300

300

mA

2

Current amplification factor (high currents)

900

1100

1600

3

Current amplification factor (low currents)

900

1400

1700

4

Delay

100

ns