AD9060SLASHPCB datasheet(3/12 Pages) AD

3 / 12 page

AD9060

–3–

REV. A

Test

AD9060JE/JZ

AD9060KE/KZ

Parameter (Conditions)

Temp

Level

Min

Typ

Max

Min

Typ

Max

Units

DYNAMIC PERFORMANCE

(CONTINUED)

Signal-to-Noise Ratio

(Without Harmonics)

fIN = 2.3 MHz

+25

°C

fIN = 10.3 MHz

+25

°C

fIN = 29.3 MHz

+25

°C

Harmonic Distortion

fIN = 2.3 MHz

+25

°C

dBc

fIN = 10.3 MHz

+25

°C

dBc

fIN = 29.3 MHz

+25

°C

dBc

Two-Tone Intermodulation

Distortion Rejection

+25

°C

dBc

Differential Phase

+25

°C

0.5

Degree

Differential Gain

+25

°CV

ENCODE INPUT

Logic “1” Voltage

Full

–1.1

Logic “0” Voltage

Full

–1.5

Logic “1” Current

Full

150

300

150

300

µA

Logic “0” Current

Full

150

300

150

300

µA

Input Capacitance

+25

°CV

Pulse Width (High)

+25

°CI

Pulse Width (Low)

+25

°CI

DIGITAL OUTPUTS

Logic “1” Voltage

Full

–1.1

Logic “0” Voltage

Full

–1.5

POWER SUPPLY

+VS Supply Current

+25

°C

420

500

420

500

Full

500

–VS Supply Current

+25

°C

150

180

150

180

Full

190

Power Dissipation

+25

°C

2.8

3.3

2.8

3.3

Full

3.5

Power Supply Rejection

Ratio (PSRR)

Full

mV/V

NOTES

1Absolute maximum ratings are limiting values to be applied individually and beyond which the serviceability of the circuit may be impaired. Functional operability is

not necessarily implied. Exposure to absolute maximum rating conditions for an extended period of time may affect device reliability.

2Typical thermal impedances (part soldered onto board): 68-pin leaded ceramic chip carrier:

JC = 1°C/W; θJA = 17°C/W (no air flow); θJA = 15°C/W

(air flow = 500 LFM). 68-pin ceramic LCC:

JC = 2.6°C/W; θJA = 15°C/W (no air flow); θJA = 13°C/W (air flow = 500 LFM).

33/4

REF, 1/2REF and 1/4REF reference ladder taps are driven from dc sources at +0.875 V, 0 V and –0.875 V, respectively. Outputs terminated through 100 Ω to –2.0 V;

CL < 4 pF. Accuracy of the overflow comparator is not tested and not included in linearity specifications.

4Measured with ANALOG IN = +V

SENSE

5Output delay measured as worst-case time from 50% point of the rising edge of ENCODE to 50% point of the slowest rising or falling edge of D

0–D9. Output skew

measured as worst-case difference in output delay among D 0–D9.

6RMS signal to rms noise with analog input signal 1 dB below full scale at specified frequency.

7Intermodulation measured with analog input frequencies of 2.3 MHz and 3.0 MHz at 7 dB below full scale.

8Measured as the ratio of the worst-case change in transition voltage of a single comparator for a 5% change m +V

S or –VS.

Specifications subject to change without notice.

AD9060/PCB Datasheet(PDF) 3 Page - Analog Devices

AD9060/PCB Datasheet(HTML) 3 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12

Datasheet Download

Link URL