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MMDF2C01HD Datasheet(PDF) 8 Page - Motorola, Inc

Part # MMDF2C01HD
Description  COMPLEMENTARY DUAL TMOS POWER FET 2.0 AMPERES 12 VOLTS
PDF  12 Pages
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Manufacturer  MOTOROLA [Motorola, Inc]
Direct Link  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

MMDF2C01HD Datasheet(HTML) 8 Page - Motorola, Inc

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MMDF2C01HD
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Motorola TMOS Power MOSFET Transistor Device Data
t, TIME
Figure 11. Reverse Recovery Time (trr)
di/dt = 300 A/
µs
Standard Cell Density
High Cell Density
tb
trr
ta
trr
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define
the maximum simultaneous drain–to–source voltage and
drain current that a transistor can handle safely when it is for-
ward biased. Curves are based upon maximum peak junc-
tion temperature and a case temperature (TC) of 25°C. Peak
repetitive pulsed power limits are determined by using the
thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal Resistance – Gen-
eral Data and Its Use.”
Switching between the off–state and the on–state may tra-
verse any load line provided neither rated peak current (IDM)
nor rated voltage (VDSS) is exceeded, and that the transition
time (tr, tf) does not exceed 10 µs. In addition the total power
averaged over a complete switching cycle must not exceed
(TJ(MAX) – TC)/(R
θJC).
A power MOSFET designated E–FET can be safely used
in switching circuits with unclamped inductive loads. For reli-
able operation, the stored energy from circuit inductance dis-
sipated in the transistor while in avalanche must be less than
the rated limit and must be adjusted for operating conditions
differing from those specified. Although industry practice is to
rate in terms of energy, avalanche energy capability is not a
constant. The energy rating decreases non–linearly with an
increase of peak current in avalanche and peak junction tem-
perature.
N–Channel
P–Channel
Figure 12. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Rated Forward Biased
Safe Operating Area
0.1
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
1
10
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.01
VGS = 8 V
SINGLE PULSE
TC = 25°C
10
0.1
dc
10 ms
1
100
100
Mounted on 2” sq. FR4 board (1” sq. 2 oz. Cu 0.06”
thick single sided) with one die operating, 10s max.
1 ms
0.1
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
1
10
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.01
VGS = 20 V
SINGLE PULSE
TC = 25°C
10
0.1
dc
10 ms
1
100
100
Mounted on 2” sq. FR4 board (1” sq. 2 oz. Cu 0.06”
thick single sided) with one die operating, 10s max.
1 ms
100
µs
10
µs



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