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ACTF512K32 Datasheet(PDF) 2 Page - Aeroflex Circuit Technology

Part # ACTF512K32
Description  ACT-F512K32 High Speed 16 Megabit FLASH Multichip Module
PDF  20 Pages
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Manufacturer  AEROFLEX [Aeroflex Circuit Technology]
Direct Link  http://www.aeroflex.com
Logo AEROFLEX - Aeroflex Circuit Technology

ACTF512K32 Datasheet(HTML) 2 Page - Aeroflex Circuit Technology

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SCD1665 REV B 6/29/01 Plainview NY (516) 694-6700
2
sealed co-fired ceramic 66 pin, 1.08"SQ PGA
or a 68 lead, .88"SQ Ceramic Gull Wing CQFP
package for operation over the temperature
range
of
-55°C
to
+125°C
and
military
environment.
Each flash memory die is organized as
512KX8
bits
and
is
designed
to
be
programmed in-system
with
the standard
system 5.0V Vcc supply. A 12.0V VPP is not
required for write or erase operations.
The
MCM can also be reprogrammed with standard
EPROM programmers (with the proper socket).
The standard ACT–F512K32 offers access
times between 60ns and 150ns, allowing
operation
of
high-speed
microprocessors
without
wait
states.
To
eliminate
bus
contention, the device has separate chip
enable (CE) and write enable (WE).
The
ACT-F512K32 is command set compatible with
JEDEC
standard
4
Mbit
EEPROMs.
Commands are written to the command
register using standard microprocessor write
timings. Register contents serve as input to an
internal state-machine which controls the
erase and programming circuitry. Write cycles
also internally latch addresses and data
needed
for
the
programming
and
erase
operations.
Reading data out of the device is similar to
reading from 12.0V Flash or EPROM devices.
The
ACT-F512K32
is
programmed
by
executing the program command sequence.
This will invoke the Embedded Program
Algorithm which is an internal algorithm that
automatically times the program pulse widths
and verifies proper cell margin. Typically, each
sector can be programmed and verified in less
than one second. Erase is accomplished by
executing the erase command sequence. This
will invoke the Embedded Erase Algorithm
which
is
an
internal
algorithm
that
automatically preprograms the array, (if it is not
already programmed) before executing the
erase operation. During erase, the device
automatically times the erase pulse widths and
verifies proper cell margin.
Each die in the module or any individual
sector of the die is typically erased and verified
in
1.5
seconds
(if
already
completely
preprogrammed).
Each die also features a sector erase
architecture. The sector mode allows for 64K
byte blocks of memory to be erased and
reprogrammed without affecting other blocks.
The ACT-F512K32 is erased when shipped
from the factory.
The device features single 5.0V power
supply operation for both read and write
functions. lnternally generated and regulated
voltages are provided for the program and
erase
operations.
A
low
VCC
detector
automatically inhibits write operations on the
loss of power. The end of program or erase is
detected by Data Polling of D7 or by the Toggle
Bit feature on D6. Once the end of a program
or erase cycle has been completed, the device
internally resets to the read mode.
All bits of each die, or all bits within a
sector
of
a
die,
are
erased
via
Fowler-Nordhiem
tunneling.
Bytes
are
programmed one byte at a time by hot electron
injection.
DESC Standard Military Drawing (SMD)
numbers are released.
General Description, Cont’d,



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