LG1600FXH datasheet(10/20 Pages) AGERE

10 / 20 page

Data Sheet

LG1600FXH Clock and Data Regenerator

August 1999

Lucent Technologies Inc.

Test Circuit

12-3234(F)r.6

Notes:

Resistor RX determines the PLL bandwidth and is required for normal operation. The LG1600FXH differs in this respect from the LG1600AXD

CDR, which has an internal resistor that sets a minimum bandwidth. The recommended value is 140

Ω for optimal jitter transfer performance.

Capacitor CX is optional and can be used to increase the damping of the PLL in critical applications.

The outputs may be either ac coupled, as indicated, or dc terminated into 50

Ω. In the first case, good output return loss can be obtained. The

latter configuration provides a 0 mV to –800 mV output swing for easy interface to dc-coupled circuits.

Figure 10. LG1600FXH Typical Test Circuit

500 k

Ω

VCO

V+CLKO

V–CLKO

FREQ. &

PHASE

DETECT.

0°

90°

LOOP CONTROL &

SIGNAL DETECT

VREF

CEXT

REXT

LOS

V–TH

V–FB

V–IN

V+IN

V+FB

0.047

µF

0.047

µF

0.047

µF

0.047

µF

1 k

Ω

25 k

Ω

25 k

Ω

1 k

Ω

V+OUT

V–OUT

0.047

µF

Ω

DATA

GENERATOR

OPTIONAL

THRESHOLD

CONTROL

ALTERNATIVE

Ω

OPTIONAL

Ca > 0.1

µF/fB

VSS

5.2 V

OPTIONAL

Cb > 100 pF/fB

Ω

OPTIONAL

(SEE TEXT)

RX = 140

Ω

REQUIRED

0.047

µF

10 k

Ω

VDD

5 V

VLOS

VSS

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