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PIC16F690IP Datasheet(PDF) 36 Page - Microchip Technology |
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PIC16F690IP Datasheet(HTML) 36 Page - Microchip Technology |
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36 / 306 page  PIC16F631/677/685/687/689/690 DS41262E-page 34 © 2008 Microchip Technology Inc. TABLE 2-3: PIC16F631/677/685/687/689/690 SPECIAL FUNCTION REGISTERS SUMMARY BANK 2 Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR Page Bank 2 100h INDF Addressing this location uses contents of FSR to address data memory (not a physical register) xxxx xxxx 44,205 101h TMR0 Timer0 Module Register xxxx xxxx 81,205 102h PCL Program Counter’s (PC) Least Significant Byte 0000 0000 44,205 103h STATUS IRP RP1 RP0 TO PD ZDC C 0001 1xxx 36,205 104h FSR Indirect Data Memory Address Pointer xxxx xxxx 44,205 105h PORTA(4) — — RA5 RA4 RA3 RA2 RA1 RA0 --xx xxxx 59,205 106h PORTB(4) RB7 RB6 RB5 RB4 — — — — xxxx ---- 69,205 107h PORTC(4) RC7 RC6 RC5 RC4 RC3 RC2 RC1 RC0 xxxx xxxx 76,205 108h — Unimplemented — — 109h — Unimplemented — — 10Ah PCLATH — — — Write Buffer for the upper 5 bits of the Program Counter ---0 0000 44,205 10Bh INTCON GIE PEIE T0IE INTE RABIE T0IF INTF RABIF(1) 0000 000x 38,205 10Ch EEDAT EEDAT7 EEDAT6 EEDAT5 EEDAT4 EEDAT3 EEDAT2 EEDAT1 EEDAT0 0000 0000 120,206 10Dh EEADR EEADR7(3) EEADR6 EEADR5 EEADR4 EEADR3 EEADR2 EEADR1 EEADR0 0000 0000 120,206 10Eh EEDATH(2) — — EEDATH5 EEDATH4 EEDATH3 EEDATH2 EEDATH1 EEDATH0 --00 0000 120,206 10Fh EEADRH(2) — — — — EEADRH3 EEADRH2 EEADRH1 EEADRH0 ---- 0000 120,206 110h — Unimplemented — — 111h — Unimplemented — — 112h — Unimplemented — — 113h — Unimplemented — — 114h — Unimplemented — — 115h WPUB WPUB7 WPUB6 WPUB5 WPUB4 — — — — 1111 ---- 70,206 116h IOCB IOCB7 IOCB6 IOCB5 IOCB4 — — — — 0000 ---- 70,206 117h — Unimplemented — — 118h VRCON C1VREN C2VREN VRR VP6EN VR3 VR2 VR1 VR0 0000 0000 105,206 119h CM1CON0 C1ON C1OUT C1OE C1POL — C1R C1CH1 C1CH0 0000 -000 98,206 11Ah CM2CON0 C2ON C2OUT C2OE C2POL — C2R C2CH1 C2CH0 0000 -000 99,206 11Bh CM2CON1 MC1OUT MC2OUT — — — — T1GSS C2SYNC 00-- --10 101,206 11Ch — Unimplemented — — 11Dh — Unimplemented — — 11Eh ANSEL ANS7 ANS6 ANS5 ANS4 ANS3(3) ANS2(3) ANS1 ANS0 1111 1111 61,206 11Fh ANSELH(3) — — — — ANS11 ANS10 ANS9 ANS8 ---- 1111 115,206 Legend: – = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented Note 1: MCLR and WDT Reset does not affect the previous value data latch. The RABIF bit will be cleared upon Reset but will set again if the mismatch exists. 2: PIC16F685/PIC16F689/PIC16F690 only. 3: PIC16F677/PIC16F685/PIC16F687/PIC16F689/PIC16F690 only. 4: Port pins with analog functions controlled by the ANSEL and ANSELH registers will read ‘0’ immediately after a Reset even though the data latches are either undefined (POR) or unchanged (other Resets). |
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