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OMAP3530ECBC72 Datasheet(PDF) 214 Page - Texas Instruments

Part # OMAP3530ECBC72
Description  OMAP3530/25 Applications Processor: OMAP 3 Architecture
PDF  264 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

OMAP3530ECBC72 Datasheet(HTML) 214 Page - Texas Instruments

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mcspix_csn(EPOL=1)
mcspix_clk(POL=0)
mcspix_clk(POL=1)
mcspix_simo
mcspix_somi
mcspix_csn(EPOL=1)
mcspix_clk(POL=0)
mcspix_clk(POL=1)
mcspix_simo
mcspix_somi
Bitn-1
Bitn-2
Bitn-3
Bitn-4
Bit0
Bitn-1
Bitn-2
Bitn-3
Bitn-4
Bit0
Bitn-1
Bitn-2
Bitn-3
Bit1
Bit0
Bitn-1
Bitn-2
Bitn-3
Bit1
Bit0
SM5
SM6
SM4
SM3
SM1
SM0
SM2
SM1
SM0
SM5
SM6
SM3
SM1
SM0
SM1
SM0
SM2
SM4
SM7
Mode0&2
Mode1&3
030-077
OMAP3530/25 Applications Processor
SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009
www.ti.com
Figure 6-42. McSPI Interface – Transmit and Receive in Master Mode(1)(2)(3)
(1) The active clock edge (rising or falling) on which mcspix_simo is driven and mcspi_somi data is latched is software configurable with the
bit MSPI_CHCONFx[0] = PHA and the bit MSPI_CHCONFx[1] = POL.
(2) The polarity of mcspix_csi is software configurable with the bit MSPI_CHCONFx[6] = EPOL.
(3) In mcspix, x is equal to 1. In mcspix_csn, n is equal to 0, 1, 2, or 3.
214
TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS
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