ICS663

PLL BUILDING BLOCK

PLL BUILDING BLOCK

IDT™ / ICS™ PLL BUILDING BLOCK

4

ICS663

REV E 012006

AC Electrical Characteristics

VDD = 3.3 V ±5%, Ambient Temperature -40 to +85

° C, unless stated otherwise

VDD = 5.0 V ±10%, Ambient Temperature -40 to +85

° C, unless stated otherwise

Note 1: Minimum input frequency is limited by loop filter design. 1 kHz is a practical minimum limit.

Thermal Characteristics

Parameter

Symbol

Conditions

Min.

Typ.

Max.

Units

Output Clock Frequency

(from pin CLK)

SEL = 1

1

100

MHz

SEL = 0

0.25

25

MHz

Input Clock Frequency

(into pins REFIN or FBIN)

Note 1

8

MHz

Output Rise Time

0.8 to 2.0V

1.2

2

ns

Output Fall Time

2.0 to 0.8V

0.75

1.5

ns

Output Clock Duty Cycle

At VDD/2

40

50

60

%

Jitter, Absolute peak-to-peak

250

ps

VCO Gain

200

MHz/V

Charge Pump Current

2.5

µA

Parameter

Symbol

Conditions

Min.

Typ.

Max.

Units

Output Clock Frequency

(from pin CLK)

SEL = 1

1

120

MHz

SEL = 0

0.25

30

MHz

Input Clock Frequency

(into pins REFIN or FBIN)

Note 1

8

MHz

Output Rise Time

0.8 to 2.0 V

0.5

1

ns

Output Fall Time

2.0 to 0.8 V

0.5

1

ns

Output Clock Duty Cycle

At VDD/2

45

50

55

%

Jitter, Absolute peak-to-peak

150

ps

VCO Gain

200

MHz/V

Charge Pump Current

2.5

µA

Parameter

Symbol

Conditions

Min.

Typ.

Max.

Units

Thermal Resistance Junction to

Ambient

Still air

150

° C/W

1 m/s air flow

140

° C/W

3 m/s air flow

120

° C/W

Thermal Resistance Junction to Case

40

° C/W