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AD9523-1/PCBZ Datasheet(PDF) 53 Page - Analog Devices

Part # AD9523-1/PCBZ
Description  Low Jitter Clock Generator
PDF  60 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9523-1/PCBZ Datasheet(HTML) 53 Page - Analog Devices

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AD9523-1
Rev. B | Page 53 of 60
Readback (Address 0x22C to Address 0x22D)
Table 54. Readback Registers (Readback 0 and Readback 1)
Address
Bits
Bit Name
Description
7
Status PLL2 reference clock
1: OK.
0: off/clocks are missing.
6
Status PLL2 feedback clock
1: OK.
0: off/clocks are missing.
5
Status VCXO
1: OK.
0: off/clocks are missing.
4
Status REF_TEST
1: OK.
0: off/clocks are missing.
3
Status REFB
1: OK.
0: off/clocks are missing.
2
Status REFA
1: OK.
0: off/clocks are missing.
1
Lock detect PLL2
1: locked.
0: unlocked.
0x22C
0
Lock detect PLL1
1: locked.
0: unlocked.
[7:4]
Reserved
Reserved.
3
Holdover active
1: holdover is active (both references are missing).
0: normal operation.
2
Selected reference
(in auto mode)
Selected reference (applies only when the device automatically selects the reference;
for example, not in manual control mode).
1: REFB.
0: REFA.
1
Reserved
Reserved.
0x22D
0
VCO calibration in progress
1: VCO calibration in progress.
0: VCO calibration not in progress.



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