LTC1294BCSW datasheet(24/28 Pages) LINER

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LTC1293/LTC1294/LTC1296

129346fs

APPLICATI

I FOR ATIO

This means four channels can handle 7mA of input current

each. Reducing CLK frequency from a maximum of 1MHz

(See typical performance characteristics curves Maxi-

mum CLK Frequency vs Source Resistance and Sample

and Hold Acquisition Time vs Source Resistance) allows

the use of larger current limiting resistors. The “+” input

can accept a resistor value of 1k

Ω but the “–” input cannot

accept more than 250

Ω when the maximum clock fre-

quency of 1MHz is used. If the LTC1293/4/6 is clocked at

the maximum clock frequency and 250

Ω is not enough to

current limit the “–” input source then the clamp diodes

are recommended (Figures 20a and 20b). The reason for

the limit on the resistor value is the MSB bit test is affected

by the value of the resistor placed at the “–” input (see

discussion on Analog Inputs and the typical performance

characteristics curve Maximum CLK Frequency vs Source

Resistance).

If VCC and VREF are not tied together, then VCC should be

turned on first, then VREF. If this sequence cannot be met

connecting a diode from VREF to VCC is recommended (see

Figure 21).

For dual supplies (bipolar mode) placing two Schottky

diodes from VCC and V

– to ground (Figure 22) will prevent

Figure 20a. Overvoltage Protection for Inputs

Figure 19. Overvoltage Protection for Inputs

Figure 22. Power Supply Reversal

Figure 21

power supply reversal from occuring when an input source

is applied to the analog MUX before power is applied to the

device. Power supply reversal occurs, for example, if the

input is pulled below V

–. V

CC will then pull a diode drop

below ground which could cause the device not to power

up properly. Likewise, if the input is pulled above VCC, V

–

will be pulled a diode drop above ground. If no inputs are

present on the MUX, the Schottky diodes are not required

if V

– is applied first then V

CC.

Because a unique input protection structure is used on the

digital input pins, the signal levels on these pins can

exceed the device VCC without damaging the device.

Figure 20b. Overvoltage Protection for Inputs

+5V

LTC1293 F19

DGND

V–

AGND

VCC

1N4148 DIODES

LTC1293/4/6

–5V

+5V

LTC1293 F20a

DGND

V–

AGND

VCC

–

250

Ω

LTC1293/4/6

–5V

+5V

LTC1293 F20b

DGND

V–

AGND

VCC

–

LTC1293/4/6

1N4148 DIODES

–5V

+5V

LTC1293 F22

DGND

AGND

VCC

LTC1293/4/6

1N5817

–5V

V–

1N5817

+5V

LTC1293 F21

DGND

AGND

VCC

LTC1293/4/6

1N4148

+5V

REF+

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