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AMC7812SPAPR Datasheet(PDF) 33 Page - Texas Instruments |
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AMC7812SPAPR Datasheet(HTML) 33 Page - Texas Instruments |
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33 / 92 page  CNVT DAV FirstConversionof theChannelsSpecifiedin theADCChannelRegister First Trigger b)ExternalTrigger,AutoMode: 1 s m CNVT DAV SecondConversionof theChannelsSpecifiedin theADCChannelRegister ThirdConversionof theChannelsSpecifiedin theADCChannelRegister First Trigger Second Trigger Third Trigger FirstConversionof theChannelsSpecifiedin theADCChannelRegister SecondConversionof theChannelsSpecifiedin theADCChannelRegister ThirdConversionof theChannelsSpecifiedin theADCChannelRegister a)ExternalTrigger,DirectMode: SS SDI DAV SetICONV bitto ‘1’ DATA First Internal Trigger ReadData DATA ReadData SetICONV bitto ‘1’ Second Internal Trigger FirstConversionof theChannelsSpecifiedin theADCChannelRegister SecondConversionof theChannelsSpecifiedin theADCChannelRegister SS SDI DAV SetICONV bitto ‘1’ Internal Trigger 1 s m FirstConversionof theChannelsSpecifiedin theADCChannelRegister SecondConversion ThirdConversion b)InternalTrigger,AutoMode: a)InternalTrigger,DirectMode: AMC7812 www.ti.com SBAS513E – JANUARY 2011 – REVISED SEPTEMBER 2013 Handshaking with the Host (see AMC Configuration Register 0) The DAV pin and the DAVF (data available flag) bit in AMC Configuration Register 0 provide handshaking with the host. Pin and bit status depend on the conversion mode (direct or auto), as shown in Figure 84 and Figure 85. In direct mode, after ADC-n-Data Registers of all of the selected channels are updated, the DAVF bit in AMC Configuration Register 0 is set immediately to '1', and the DAV pin is active (low) to signify that new data are available. Reading the ADC-n-Data Register or restarting via the external CNVT pin, the ADC clears the DAVF bit to '0' and deactivates the DAV pin (high). If an internal convert start (ICONV bit) is used to start the new ADC conversion, in order to reset the DAV status, an ADC-n-Data Register must be read after the current conversion finishes before a new conversion can be started. In auto-mode, after the ADC-n-Data Registers of the selected channels are updated, a pulse of 1µs (low) appears on the DAV pin to signify that new data are available. However, the DAVF bit is always cleared to '0' in auto-mode. Figure 84. ADC Internal Trigger Figure 85. ADC External Trigger Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 33 Product Folder Links: AMC7812 |
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