STM32F207 datasheet(156/163 Pages) STMICROELECTRONICS

156 / 163 page

Revision history

STM32F205xx, STM32F207xx

156/163

Doc ID 15818 Rev 7

13-Jul-2010

Renamed high-speed SRAM, system SRAM.

Removed combination: 128 KBytes Flash memory in LQFP144.

Added UFBGA176 package. Added note 1 related to LQFP176

package in Table 2, Figure 12, and Table 87.

Added information on ART accelerator and audio PLL (PLLI2S).

Added Table 4: USART feature comparison.

Several updates on Table 5: STM32F20x pin and ball definitions and

Table 6: Alternate function mapping. ADC, DAC, oscillator, RTC_AF,

WKUP and VBUS signals removed from alternate functions and

moved to the “other functions” column in Table 5: STM32F20x pin and

ball definitions.

TRACESWO added in Figure 4: STM32F20x block diagram, Table 5:

STM32F20x pin and ball definitions, and Table 6: Alternate function

mapping.

XTAL oscillator frequency updated on cover page, in Figure 4:

STM32F20x block diagram and in Section 2.2.12: External

interrupt/event controller (EXTI).

Updated list of peripherals used for boot mode in Section 2.2.14: Boot

modes.

Added Regulator bypass mode in Section 2.2.17: Voltage regulator,

and Section 5.3.4: Operating conditions at power-up / power-down

(regulator OFF).

Updated Section 2.2.18: Real-time clock (RTC), backup SRAM and

backup registers.

Added Note Note: in Section 2.2.19: Low-power modes.

Added SPI TI protocol in Section 2.2.28: Serial peripheral interface

(SPI).

Added USB OTG_FS features in Section 2.2.33: Universal serial bus

on-the-go full-speed (OTG_FS).

Updated VCAP_1 and VCAP_2 capacitor value to 2.2 µF in Figure 17:

Power supply scheme.

Removed DAC, modified ADC limitations, and updated I/O

compensation for 1.8 to 2.1 V range in Table 11: Limitations depending

on the operating power supply range.

Added VBORL, VBORM, VBORH and IRUSH in Table 14: Embedded reset

and power control block characteristics.

Removed table Typical current consumption in Sleep mode with Flash

memory in Deep power down mode. Merged typical and maximum

current consumption sections and added Table 15: Typical and

maximum current consumption in Run mode, code with data

processing running from Flash memory (ART accelerator disabled),

Table 16: Typical and maximum current consumption in Run mode,

code with data processing running from Flash memory (ART

accelerator enabled) or RAM, Table 17: Typical and maximum current

consumption in Sleep mode, Table 18: Typical and maximum current

consumptions in Stop mode, Table 19: Typical and maximum current

consumptions in Standby mode, and Table 20: Typical and maximum

current consumptions in VBAT mode.

Update Table 29: Main PLL characteristics and added Section 5.3.11:

PLL spread spectrum clock generation (SSCG) characteristics.

Table 89.

Document revision history (continued)

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STM32F207 Datasheet(PDF) 156 Page - STMicroelectronics

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