Electronic Components Datasheet Search
  British  ▼
ALLDATASHEET.CO.UK

X  

AS5043 Datasheet(PDF) 33 Page - ams AG

Part # AS5043
Description  Programmable 360 Magnetic Angle Encoder with Absolute SSI and Analog Outputs
PDF  37 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AMSCO [ams AG]
Direct Link  http://www.ams.com
Logo AMSCO - ams AG

AS5043 Datasheet(HTML) 33 Page - ams AG

Back Button AS5043_09 Datasheet HTML 29Page - ams AG AS5043_09 Datasheet HTML 30Page - ams AG AS5043_09 Datasheet HTML 31Page - ams AG AS5043_09 Datasheet HTML 32Page - ams AG AS5043_09 Datasheet HTML 33Page - ams AG AS5043_09 Datasheet HTML 34Page - ams AG AS5043_09 Datasheet HTML 35Page - ams AG AS5043_09 Datasheet HTML 36Page - ams AG AS5043_09 Datasheet HTML 37Page - ams AG  
Zoom Inzoom in Zoom Outzoom out
 33 / 37 page
background image
AS5043
Data Sheet – Electrical Characteristics
www.austriamicrosystems.com
Revision 1.80
32 – 36
Figure 24: Integral and Differential Non-Linearity (exaggerated curve)
180°
360 °
0 °
0
512
1023
α
α10bitcode
0
1
2
0.35°
INL
Ideal curve
Actual curve
TN
512
1023
DNL+1LSB
[degrees]
Integral Non-Linearity (INL) is the maximum deviation between actual position and indicated position.
Differential Non-Linearity (DNL) is the maximum deviation of the step length from one position to the next.
Transition Noise (TN) is the repeatability of an indicated position.
19.6 Timing Characteristics
Synchronous Serial Interface (SSI)
(operating conditions: Tamb = -40 to +125°C, VDD5V = 3.0-3.6V (3V operation) VDD5V = 4.5-5.5V (5V operation) unless
otherwise noted)
Parameter
Symbol
Min
Typ
Max
Unit
Note
Data output activated
(logic high)
t DO active
100
ns
Time between falling edge of CSn and data
output activated
First data shifted to output
register
tCLK FE
500
ns
Time between falling edge of CSn and first
falling edge of CLK
Start of data output
T CLK / 2
500
ns
Rising edge of CLK shifts out one bit at a time
Data output valid
t DO valid
413
ns
Time between rising edge of CLK and data
output valid
Data output tristate
t DO tristate
100
ns
After the last bit DO changes back to “tristate”
Pulse width of CSn
t CSn
500
ns
CSn = high; To initiate read-out of next
angular position
Read-out frequency
fCLK
>0
1
MHz Clock frequency to read out serial data
19.7 Programming Conditions
(operating conditions: Tamb = -40 to +125°C, VDD5V = 3.0-3.6V (3V operation) VDD5V = 4.5-5.5V (5V operation) unless
otherwise noted)
Parameter
Symbol
Min
Typ
Max
Unit Note
Programming enable time
t Prog enable
2
µs
Time between rising edge at Prog
pin and rising edge of CSn
Write data start
t Data in
2
µs
Write data valid
t Data in valid
250
ns
Write data at the rising edge of
CLKPROG



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com