UC3842A/3843A

LINEAR INTEGRATED CIRCUIT

UNISONICTECHNOLOGIESCO.,LTD

5 of 9

www.unisonic.com.tw

QW-R103-002.G

OPEN-LOOP LABORATORY TEST FIXTURE

High peak current associated with capacity loads necessitate careful grounding techniques. Timing and bypass

capacitors should be connected close to Pin 5 in single point GND. The transistor and 5kΩ potentio-meter are used

to sample the oscillator waveform and apply an adjustable Ramp to Pin 3.

UNDER-VOLTAGE LOCKOUT

During Under-Voltage Lockout, the output driver is biased to a high impedance state. Pin 6 should be shunt to

GND with a bleeder resistor to prevent activating the power switch with output leakage currents.

ERROR AMPLIFIER CONFIGURATION

2

1

0.5mA

2.5V

Zf

Zi

Error amplifier can source or sink up to 0.5mA