IXFR80N60P3

IXYS Reserves the Right to Change Limits, Test Conditions, and Dimensions.

Fig. 7. Input Admittance

0

20

40

60

80

100

120

3.0

3.5

4.0

4.5

5.0

5.5

6.0

6.5

7.0

25ºC

- 40ºC

Fig. 8. Transconductance

0

20

40

60

80

100

120

140

160

0

20

40

60

80

100

120

125ºC

25ºC

Fig. 9. Forward Voltage Drop of Intrinsic Diode

0

40

80

120

160

200

240

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

1.1

1.2

1.3

Fig. 10. Gate Charge

0

1

2

3

4

5

6

7

8

9

10

0

20

40

60

80

100

120

140

160

180

200

Fig. 11. Capacitance

1

10

100

1,000

10,000

100,000

0

5

10

15

20

25

30

35

40

f = 1 MHz

Ciss

Crss

Coss

Fig. 12. Forward-Bias Safe Operating Area

1

10

100

1000

10

100

1,000

Single Pulse

100µs

1ms

25µs