Figure 1. The Petaluma subsystem design block diagram.

Features

Competitive Advantages

High precision, 8-channel, simultaneous-sampling inputs

High-speed 250ksps sampling rate

High-accuracy 16-bit resolution

Device drivers

Example C source code

Configuration files for ZedBoard™ platform

FMC-compatible

Applications

Three-phase power measurement

Power grid protection

Multiphase motor control

Vibration and waveform analysis

High-performance energy measurement subsystem

Cost optimized

Energy efficient

Detailed Description of Hardware

The Petaluma subsystem is optimized for applications that use multiple high-speed, high-accuracy, simultaneous-sampling analog

inputs. Figure 1 shows the block diagram of the Petaluma reference design.

The MAX44252 devices (U1 and U2) are quadruple ultra-precision, low-noise op amps. The op amps attenuate and buffer the

±10V input signals to match the input range of the ADC (MAX11046). The MAX44252 devices are set up in the inverting

configuration, so the polarity of the signal is reversed at the input of the ADC. The formula to convert the ADC code to voltage is:

10-CODE/65536*20.

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