HT47C20 datasheet(9/56 Pages) HOLTEK

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HT47C20

January 18, 2000

Functional Description

Execution flow

The system clock for the HT47C20 is derived

from either a crystal or an RC oscillator. The

system clock is internally divided into four

non-overlapping clocks. One instruction cycle

consists of four system clock cycles.

Instruction fetching and execution are

pipelined in such a way that a fetch takes one

instruction cycle while decoding and execution

takes the next instruction cycle. However, the

pipelining scheme causes each instruction to ef-

fectively execute in one cycle. If an instruction

changes the program counter, two cycles are re-

quired to complete the instruction.

Program counter - PC

The 11-bit program counter (PC) controls the

sequence in which the instructions stored in the

program ROM are executed and its contents

specify a maximum of 2048 addresses.

After accessing a program memory word to

fetch an instruction code, the contents of the

program counter are incremented by one. The

program counter then points to the memory

word containing the next instruction code.

When executing a jump instruction, conditional

skip execution, loading PCL register, subrou-

tine call, initial reset, internal interrupt, exter-

nal interrupt or return from subroutine, the PC

manipulates the program transfer by loading

the address corresponding to each instruction.

The conditional skip is activated by instruction.

Once the condition is met, the next instruction,

fetched during the current instruction execu-

tion, is discarded and a dummy cycle replaces it

to get the proper instruction. Otherwise pro-

ceed with the next instruction.

The lower byte of the program counter (PCL) is

a readable and writeable register (06H).

Moving data into the PCL performs a short

jump. The destination will be within 256 loca-

tions.

When a control transfer takes place, an addi-

tional dummy cycle is required.

Program memory - ROM

The program memory is used to store the pro-

gram instructions which are to be executed. It

also contains data, table, and interrupt entries,

and is organized into 2048´16 bits, addressed

by the program counter and table pointer.

Certain locations in the program memory are

reserved for special usage

· Location 000H

This area is reserved for the initialization

program. After chip reset, the program al-

ways begins execution at location 000H.

· Location 004H

This area is reserved for the external inter-

rupt service program. If the INT input pin is

activated, and the interrupt is enabled and

F e tc h IN S T ( P C )

Exe cu t e I N S T ( P C - 1 )

F e tc h IN S T ( P C + 1 )

Exe cu t e I N S T ( P C )

F e tc h IN S T ( P C + 2 )

Exe cu t e I N S T ( P C + 1 )

PC + 1

PC + 2

S yst e m C l o ck

I n st r u ct i o n C l o c k

Execution flow

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