Active Errata List

1.

Reading Error

Errata History

Errata Description

1.

Reading error Description

Some AT60142 parts show a failure during read operation. Failure is always a 0 read

fail (read 1 instead of 0). Read 1 is always fine.

Error is located in:

- Bit 5 : less than 5 bits are impacted on last column and last but one line

- Bit 6 : only 1 bit is impacted on last column and last but one line

When Bit6 fails, Bit5 has always already failed.

Other bit planes are never impacted.

The failure does not depend on activity on other addresses over the rest of memory.

Output enable has no influence on reading error behavior.

When a bit is failing, it can be reproduced any time on any tester at the same location,

in the same conditions.

In conclusion, there may exist a very narrow window, within which, if the chip select

line is asserted low and address lines change, a corruption of data Bit 5 (and Bit 6

sometimes) occurs during a RAM zero read access.

Typical window size is 0.2ns

Failure Conditions

•

Addresses are stable at time T0.

•

The RAM chip select (CSn) is driven low in a T0 - 4ns / T0 - 1ns timing window.

•

Worst case conditions: 125°C

Lot Number

Errata List

All AT60142F lots

1

All AT60142FT lots

1

Rad Hard 512K

x8 Very Low

Power CMOS

SRAM

AT60142F/FT

Errata Sheet

7776E–AERO–06/08