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UPD16340 Datasheet(PDF) 5 Page - NEC |
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UPD16340 Datasheet(HTML) 5 Page - NEC |
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5 / 16 page ![]() Data Sheet S13685EJ1V0DS00 5 µµµµ PD16340 TRUTH TABLE Shift Register Block Input Output R,/L CLK A B Shift Register H ↑ Output Note1 Right shift operation performed HH or L Input Output Hold L ↑ Output Note2 Left shift operation performed L H or L Output Input Hold Notes 1. On the rising edge of the clock, the data of S91-S93 (S85-S90) is shifted to S94-S96 (S91-S96), and is output from B1-B3 (B1-B6) (The parenthesized pins are used in 6-bit input mode.). 2. On the rising edge of the clock, the data of S4-S6 (S7-S12) is shifted to S1-S3 (S1-S6), and is output from A1-A3 (A1-A6) (The parenthesized pins are used in 6-bit input mode.). Latch Block /LE Output State of Latch Section (/Ln) ↓ Latch Sn data H or L Hold latch (output) data Driver Block A (B) /HBLK /LBLK HZ Output State of Driver Block x L H L All driver output : H x x L L All driver output : L x x x H All driver output : High Impedance LH H L L HH H L H Remark x : H or L, H : High level, L : Low level |
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