DocID026176 Rev 1

13/20

AN4470

System calibration

20

3.1.1

Step-by-step amplitude calibration procedure

The following steps summarize the calibration procedure explained above:

1.

2.

Reset the STPM3x to have registers in the default state

3.

Configure the device through CPC according to the chosen application. The following

registers have to be configured (one or both primary and secondary channels,

according to the application and to the device p/n):

•

ROCx (in DSP_CR1 or DSP_CR2)

–

0: for CT or shunt

–

1: for Rogowski coil

•

GAINx (in DFE_CR1 or DFE_CR2) to set the correct current gain channel

•

CHVx and CHCx (in DSP_CR5 and DSP_CR8) have to be set to default (0x800)

obtaining a calibration range of ±12.5% of voltage or current channel

4.

with PF =1 to one or both primary and secondary channels. For the stability of the

source please refer to the equipment documentation; add 0.5 seconds to the maximum

so that the STPM3x RMS values are stable

5.

Perform RMS register sample acquisition (DSP_REG14 and/or DSP_REG15) through

samples in 5 line cycles

6.

Calculate CHVx and CHCx calibrators using Equation 13 and Equation 14

7.

Write calibration values to the device and store them in a non-volatile memory

The whole procedure requires one second in an automated environment.

3.2

Phase-shift calibration

The STPM3x does not introduce any phase-shift between voltage and current channels.

However, voltage and current signals come from transducers, which could have inherent

phase errors. For example, a phase error from 0.1 ° to 0.3 ° is common for a current

transformer (CT). These phase errors can vary from part-to-part, and have to be corrected

in order to perform accurate power calculations. Errors associated with phase mismatch are

particularly evident at low power factors.

The phase compensation block provides a digital correction of the phase-shift for primary

and secondary channel independently. This block introduces a delay between current and

voltage samples which is fine-tuned by PHCx[9:0] and PHVx[1:0] phase calibration bits in

DSP_CR4. The delay (in degree) introduced by these registers on the waveforms is given

below:

Current shift

Equation 15

Voltage shift

ϕ

C

f

line

SCLK

---------------- PHCx 9:0

[] 360

°

⋅⋅

=