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LTC1553 Datasheet(PDF) 17 Page - Linear Technology

Part # LTC1553
Description  5-Bit Programmable Synchronous Switching Regulator Controller
PDF  24 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC1553 Datasheet(HTML) 17 Page - Linear Technology

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LTC1553
APPLICATIONS INFORMATION
application might exhibit 5A input ripple current. SANYO
OS-CON part number 10SA220M (220
µF/10V) capacitors
feature 2.3A allowable ripple current at 85
°C; three in
parallel at the input (to withstand the input ripple current)
will meet the above requirements. Similarly, AVX
TPSE337M006R0100 (330
µF/6V) have a rated maximum
ESR of 0.1
Ω; seven in parallel will lower the net output
capacitor ESR to 0.014
Ω.Forlowcostapplication,SANYO
MV-GX series of capacitors can be used with acceptable
performance.
Feedback Loop Compensation
The LTC1553 voltage feedback loop is compensated at the
COMP pin, attached to the output node of the internal gm
error amplifier. The feedback loop can generally be com-
pensated properly with an RC + C network from COMP to
GND as shown in Figure 10a.
Loop stability is affected by the values of the inductor,
output capacitor, output capacitor ESR, error amplifier
transconductance and error amplifier compensation net-
work. The inductor and the output capacitor creates a
double pole at the frequency:
fLC =
1
2
π√(LO)(COUT)
The ESR of the output capacitor forms a zero at the
frequency:
fESR =
1
2
π(ESR)(COUT)
The compensation network at the error amplifier output is
to provide enough phase margin at the 0dB crossover
frequency for the overall closed-loop transfer function.
The zero and pole from the compensation network are:
fZ =
1
2
π(RC)(CC) and
fP =
1
2
π(RC)(C1) respectively.
Figure 10b shows the Bode plot of the overall transfer
function.
The compensation value used in this design is based on
the following criteria: fSW = 12fCO, fZ = fLC and fP = 5fCO. At
the closed-loop frequency fCO, the attenuation due the LC
filter and the input resistor divider is compensated by the
gain of the PWM modulator and the gain of the error
amplifier (gmERR)(RC). Although a mathematical approach
to frequency compensation can be used, the added
Figure 10b. Bode Plot of the LTC1553 Overall Transfer Function
Figure 10a. Compensation Pin Hook-Up
– 20dB/DECADE
fP
fZ
fCO
fESR
FREQUENCY
1553 F10b
fSW = LTC1553 SWITCHING
FREQUENCY
fCO = CLOSED-LOOP CROSSOVER
FREQUENCY
fLC
1553 F10
DAC
LTC1553
SENSE
COMP
RC
CC
C1
ERR
6
10



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