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LTC1235CS Datasheet(PDF) 8 Page - Linear Technology

Part # LTC1235CS
Description  Microprocessor Supervisory Circuit
PDF  16 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC1235CS Datasheet(HTML) 8 Page - Linear Technology

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8
LTC1235
S
APPLICATI
I FOR ATIO
To help prevent mistriggering due to transient loads, VCC
pin should be bypassed with a 0.1
µF capacitor with the
leads trimmed as short as possible.
LOW LINE is the output of the precision voltage compara-
tor C1. When VCC falls below the reset voltage threshold,
LOW LINE goes low. LOW LINE returns high as soon as
VCC rises above the reset voltage threshold.
Push-Button Reset
The LTC1235 provides an logic input pin for direct
connection to a push-button. The push-button reset input,
PB RST, requires an active low signal. Internally, this input
signal is debounced and timed for a minimum of 40ms.
When this condition is satisfied, the reset pulse generator
forces the reset outputs to active states. The reset signals
will remain in active states for a minimum of 140ms from
the moment the push-button reset input is released from
logic low level (Figure 2).
Power Monitoring
The LTC1235 uses a bandgap voltage reference and a
precision voltage comparator C1 to monitor the 5V supply
input on VCC (see BLOCK DIAGRAM). When VCC falls
below the reset voltage threshold, the reset outputs are
forced to active states. The reset voltage threshold ac-
counts for a 5% variation on VCC, so the reset outputs
become active when VCC falls below 4.75V (4.65V typical).
On power-up, the reset signals are held active states for a
minimum of 140ms after the reset voltage threshold is
reached to allow the power supply and microprocessor to
stabilize. On power-down, the RESET signal remains ac-
tive low even with VCC as low as 1V. This capability helps
hold the microprocessor in stable shutdown condition.
Figure 1 shows the timing diagram of the RESET signal.
The precision voltage comparator, C1, typically has 40mV
of hysteresis which ensures that glitches at VCC pin do not
activate the reset outputs. Response time is typically 10
µs.
Figure 1. Reset Active Time
Figure 2. Push-Button Reset
VCC
t1
t1 = RESET ACTIVE TIME
V1 = RESET VOLTAGE THRESHOLD
V2 = RESET VOLTAGE THRESHOLD +
RESET THRESHOLD HYSTERESIS
t1
V2
V2
V1
V1
LTC1235 F01
RESET
LOW LINE
LOGIC LOW
t1
LOGIC
HIGH
t2
LOGIC HIGH
LOGIC LOW
VCC = 5V
RESET
RESET
PB RST
t1 = PUSH-BUTTON RESET LOW TIME
t2 = RESET ACTIVE TIME



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