5

LTC1345

Y3 (Pin 22): Transmitter 3 Noninverting Output.

Z2 (Pin 23): Transmitter 2 Inverting Output.

Y2 (Pin 24): Transmitter 2 Noninverting Output

Z1 (Pin 25): Transmitter 1 Inverting Output.

Y1 (Pin 26): Transmitter 1 Noninverting Output.

terminal of capacitor C3.

Transmitter and Receiver Configuration

S1

S2

TX#

RX#

REMARKS

0

0

—

—

Shutdown

1

0

1, 2, 3

1, 2

DCE Mode, RX3 Shut Down

0

1

1, 2

1, 2, 3

DTE Mode, TX3 Shut Down

1

1

1, 2, 3

1, 2, 3

All Active

Transmitter

INPUTS

OUTPUTS

CONFIGURATION

S1 S2

T

Y1 AND Y2

Z1 AND Z2

Y3

Z3

DTE

0

1

0

0

1

Z

Z

DTE

0

1

1

1

0

Z

Z

DCE or All ON

1

X

0

0

1

0

1

DCE or All ON

1

X

1

1

0

1

0

Shutdown

0

0

X

Z

Z

Z

Z

Receiver

INPUTS

OUTPUTS

CONFIGURATION

S1 S2 OE

B – A

R1 AND R2

R3

DTE or All ON

X

1

0

≥0.2V

1

1

DTE or All ON

X

1

0

≤–0.2V

0

0

DCE

1

0

0

≥0.2V

1

Z

DCE

1

0

0

≤–0.2V

0

Z

Disabled

X

X

1

X

Z

Z

Shutdown

0

0

X

X

Z

Z

15pF

OE

R

50

Ω

125

Ω

Y

Z

Z

Y

T

125

Ω

50

Ω

50

Ω

LTC1345 • F01

50

Ω

B

A

Figure 1. V.35 Transmitter/Receiver Test Circuit

Figure 2. Receiver Output Enable/Disable Timing Test Load

1k

LTC1345 • F02

S1

S2

RECEIVER

OUTPUT

PI FU CTIO S

FU CTIO TABLES

TEST CIRCUITS