| Electronic Components Datasheet Search |
|
74AXP2G07 Datasheet(PDF) 7 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
74AXP2G07 Datasheet(HTML) 7 Page - NXP Semiconductors |
|
7 / 16 page ![]() 74AXP2G07 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 1 — 24 September 2014 7 of 16 NXP Semiconductors 74AXP2G07 Low-power dual buffer with open-drain output 12. Waveforms Measurement points are given in Table 9. VOL is the typical output voltage level that occurs at the output load. Fig 5. The data input (nA) to output (nY) propagation delays and output transition time Table 9. Measurement points Supply voltage Input Output VCC VM VI tr = tf VM VX 0.75 V to 1.6 V 0.5VCC VCC 3.0 ns 0.5VCC VOL +0.1 V 1.65 V to 2.7 V 0.5VCC VCC 3.0 ns 0.5VCC VOL +0.15V Tamb = 40 C to +85 C unless otherwise specified. (1) Minimum: VCC = 2.7 V (2) Typical: Tamb = 25 C; VCC = 2.5 V (3) Maximum: VCC = 2.3 V Tamb = 40 C to +85 C unless otherwise specified. (1) Minimum: VCC = 1.95 V (2) Typical: Tamb = 25 C; VCC = 1.8 V (3) Maximum: VCC = 1.65 V Fig 6. Additional tPZL versus load capacitance Fig 7. Additional tPZL versus load capacitance |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |