PIC16C745SLASHP datasheet(22/158 Pages) MICROCHIP

22 / 158 page

PIC16C745/765

DS41124A-page 22

Advanced Information

4.2.2.1

STATUS REGISTER

The STATUS register, shown in Register 4-1, contains

the arithmetic status of the ALU, the RESET status and

the bank select bits for data memory.

The STATUS register can be the destination for any

instruction, as with any other register. If the STATUS

the Z, DC or C bits, then the write to these three bits is

disabled. These bits are set or cleared according to the

device logic. Furthermore, the TO and PD bits are not

writable. Therefore, the result of an instruction with the

STATUS register as destination may be different than

intended.

For example, CLRF STATUS will clear the upper-three

bits and set the Z bit. This leaves the STATUS register

as 000u u1uu (where u = unchanged).

It is recommended that only BCF, BSF, SWAPF and

MOVWF

instructions be used to alter the STATUS regis-

ter. These instructions do not affect the Z, C or DC bits

in the STATUS register. For other instructions which do

not affect status bits, see the "Instruction Set Sum-

mary."

STATUS REGISTER (STATUS: 03h, 83h, 103h, 183h)

Note 1: The C and DC bits operate as borrow and

digit borrow bits, respectively, in subtrac-

tion. See the SUBLW and SUBWF instruc-

tions for examples.

R/W-0

R-1

R/W-x

IRP

RP1

RP0

ZDC

C(1)

R = Readable bit

W = Writable bit

U = Unimplemented bit,

read as ‘0’

- n = Value at POR reset

bit7

bit0

bit 7:

IRP: Register Bank Select bit (used for indirect addressing)

= Bank 2, 3 (100h - 1FFh)

= Bank 0, 1 (00h - FFh)

bit 6-5:

RP<1:0>: Register Bank Select bits (used for direct addressing)

= Bank 0 (00h - 7Fh)

= Bank 1 (80h - FFh)

= Bank 2 (100h - 17Fh)

= Bank 3 (180h - 1FFh)

bit 4:

TO: Time-out bit

= After power-up, CLRWDT instruction, or SLEEP instruction

= A WDT time-out occurred

bit 3:

PD: Power-down bit

= After power-up or by the CLRWDT instruction

= By execution of the SLEEP instruction

bit 2:

Z: Zero bit

= The result of an arithmetic or logic operation is zero

= The result of an arithmetic or logic operation is not zero

bit 1:

DC: Digit carry/borrow bit (ADDWF, ADDLW,SUBLW,SUBWF instructions)(1)

= A carry-out from the 4th low order bit of the result occurred

= No carry-out from the 4th low order bit of the result

bit 0:

C: Carry/borrow bit (ADDWF, ADDLW,SUBLW,SUBWF instructions)(1)

= A carry-out from the most significant bit of the result occurred

= No carry-out from the most significant bit of the result occurred

Note 1: For borrow the polarity is reversed. A subtraction is executed by adding the two’s complement of the sec-

ond operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low order bit of the

source register.

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