PIC16F84A-10SLASHSS datasheet(41/124 Pages) MICROCHIP

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PIC16F8X

DS30430C-page 41

8.3

Reset

The PIC16F8X differentiates between various kinds

of reset:

• Power-on Reset (POR)

• MCLR reset during normal operation

• MCLR reset during SLEEP

• WDT Reset (during normal operation)

• WDT Wake-up (during SLEEP)

Figure 8-8 shows a simpliﬁed block diagram of the

on-chip reset circuit. The MCLR reset path has a noise

ﬁlter to ignore small pulses. The electrical speciﬁca-

tions state the pulse width requirements for the MCLR

pin.

Some registers are not affected in any reset condition;

their status is unknown on a POR reset and unchanged

in any other reset. Most other registers are reset to a

“reset state” on POR, MCLR or WDT reset during

normal operation and on MCLR reset during SLEEP.

They are not affected by a WDT reset during SLEEP,

since this reset is viewed as the resumption of normal

operation.

Table 8-3 gives a description of reset conditions for the

program counter (PC) and the STATUS register.

Table 8-4 gives a full description of reset states for all

registers.

The TO and PD bits are set or cleared differently in dif-

ferent reset situations (Section 8.7). These bits are

used in software to determine the nature of the reset.

FIGURE 8-8:

SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT

External

Reset

MCLR

VDD

OSC1/

WDT

Module

VDD rise

detect

OST/PWRT

On-chip

RC OSC(1)

WDT

Time_Out

Power_on_Reset

OST

10-bit Ripple counter

PWRT

Chip_Reset

10-bit Ripple counter

Reset

Enable OST

Enable PWRT

SLEEP

CLKIN

Note 1:

This is a separate oscillator from the

RC oscillator of the CLKIN pin.

See Table 8-5

PIC16F84A-10/SS Datasheet(PDF) 41 Page - Microchip Technology

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