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AR0330 Datasheet(PDF) 59 Page - ON Semiconductor |
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AR0330 Datasheet(HTML) 59 Page - ON Semiconductor |
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59 / 77 page ![]() AR0330_DS Rev. U Pub. 4/15 EN 59 ©Semiconductor Components Industries, LLC,2015. AR0330: 1/3-Inch CMOS Digital Image Sensor Compression Compression The sensor can optionally compress 12-bit data to 10-bit using A-law compression. The compression is applied after the data pedestal has been added to the data. See Figure 1: “Block Diagram,” on page 6. The A-law compression is disabled by default and can be enabled by setting R0x31D0 from “0” to “1”. Test Patterns The AR0330 has the capability of injecting a number of test patterns into the top of the datapath to debug the digital logic. With one of the test patterns activated, any of the datapath functions can be enabled to exercise it in a deterministic fashion. Test patterns are selected by Test_Pattern_Mode register (R0x3070). Only one of the test patterns can be enabled at a given point in time by setting the Test_Pattern_Mode register according to Table 41. When test patterns are enabled the active area will receive the value speci- fied by the selected test pattern and the dark pixels will receive the value in Test_Pat- tern_Green (R0x3074 and R0x3078) for green pixels, Test_Pattern_Blue (R0x3076) for blue pixels, and Test_Pattern_Red (R0x3072) for red pixels. Solid Color When the color field mode is selected, the value for each pixel is determined by its color. Green pixels will receive the value in Test_Pattern_Green, red pixels will receive the value in Test_Pattern_Red, and blue pixels will receive the value in Test_Pattern_Blue. Vertical Color Bars When the vertical color bars mode is selected, a typical color bar pattern will be sent through the digital pipeline. Table 40: A-Law Compression Table for 12-10 bits Input Range Input Values Compressed Codeword 11 10 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 0 to 127 0 0 0 0 0 a b c d e f g 0 0 0 a b c d e f g 128 to 255 0 0 0 0 1 a b c d e f g 0 0 1 a b c d e f g 256 to 511 0 0 0 1 a b c d e f g X 0 1 0 a b c d e f g 512 to 1023 0 0 1 a b c d e f g X X 0 1 1 a b c d e f g 1024 to 2047 0 1 a b c d e f g h X X 1 0 a b c d e f g h 2048 to 4095 1 a b c d e f g h X X X 1 1 a b c d e f g h Table 41: Test Pattern Modes Test_Pattern_Mode Test Pattern Output 0 No test pattern (normal operation) 1 Solid Color 2 100% Vertical Color Bars 3 Fade-to-Gray Vertical Color Bars 256 Walking 1s test pattern (12-bit) |
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