ADC0804LCWM datasheet(12/56 Pages) TI1

12 / 56 page

ADC0801, ADC0802, ADC0803, ADC0804, ADC0805

SNOSBI1C – NOVEMBER 2009 – REVISED JUNE 2015

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8.2 Functional Block Diagram

(1)

CS shown twice for clarity.

(2)

SAR = Successive Approximation Register.

8.3 Feature Description

8.3.1 Understanding ADC Error Specs

A perfect ADC transfer characteristic (staircase waveform) is shown in Figure 16 and Figure 17. The horizontal

scale is analog input voltage and the particular points labeled are in steps of 1 LSB (19.53 mV with 2.5V tied to

the VREF/2 pin). The digital output codes that correspond to these inputs are shown as D

−1, D, and D+1. For

the perfect ADC, not only will center- value (A

−1, A, A+1, . . . . ) analog inputs produce the cor- rect output digital

codes, but also each riser (the transitions between adjacent output codes) will be located ±1

⁄2 LSB away from

each center-value. As shown, the risers are ideal and have no width. Correct digital output codes will be provided

for a range of analog input voltages that extend ±1

⁄2 LSB from the ideal center-values. Each tread (the range of

analog input voltage that provides the same digital output code) is therefore 1 LSB wide.

Figure 19 shows a worst case error plot for the ADC0801. All center-valued inputs are guaranteed to produce the

correct output codes and the adjacent risers are specified to be no closer to the center-value points than ±1/4

LSB. In other words, if we apply an analog input equal to the center-value ±1/4 LSB, we guarantee that the ADC

will produce the correct digital code. The maximum range of the position of the code transition is indicated by the

horizontal arrow and it is specified to be no more than 1/2 LSB.

The error curve of Figure 21 shows a worst case error plot for the ADC0802. Here we guarantee that if we apply

an analog input equal to the LSB analog voltage center-value the ADC will produce the correct digital code.

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ADC0804LCWM Datasheet(PDF) 12 Page - Texas Instruments