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AD6676EBZ Datasheet(PDF) 75 Page - Analog Devices |
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AD6676EBZ Datasheet(HTML) 75 Page - Analog Devices |
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75 / 90 page  Data Sheet AD6676 Rev. A | Page 75 of 90 Attenuator AGC2 Pin Low Value Register Address: 0x181, Reset: 0x0C, Name: ATTEN_VALUE_PIN0 Table 67. Bit Descriptions for ATTEN_VALUE_PIN1 Bits Bit Name Description Reset Access [7:0] ATTEN_VALUE_PIN0 Attenuation value to be used in ATTEN_MODE = 0 when the AGC2 pin is low. Valid range is from 0 (minimum attenuation) to 27 (maximum attenuation). Value 28 to Value 31 disable the attenuator. Default is 12 dB attenuation. 0x0C RW Attenuator AGC2 Pin High Value Register Address: 0x182, Reset: 0x0C, Name: ATTEN_VALUE_PIN1 Table 68. Bit Descriptions for ATTEN_VALUE_PIN1 Bits Bit Name Description Reset Access [7:0] ATTEN_VALUE_PIN1 Attenuation value to be used in ATTEN_MODE = 0 when the AGC2 pin is high. Valid range is from 0 (minimum attenuation) to 27 (maximum attenuation). Value 28 to Value 31 disable the attenuator. Default is 12 dB attenuation. 0x0C RW Attenuator Initialization Register Address: 0x183, Reset: 0x00, Name: ATTEN_INIT Table 69. Bit Descriptions for ATTEN_INIT Bits Bit Name Description Reset Access [7:0] ATTEN_INIT Initialize the attenuator value when using ATTEN_MODE = 1. 0x00 RW Attenuator Status Register Address: 0x184, Reset: 0x0C, Name: ATTEN_CTL Table 70. Bit Descriptions for ATTEN_CTL Bits Bit Name Description Reset Access 7 ATT_PIN Read back the state of the AGC2 pin. 0x0 R [6:5] RESERVED 0x0 RW [4:0] ATTEN_READ Read back the actual attenuation value in ATTEN_MODE. 0x0C R ADC Reset Threshold Register Address: 0x188, Reset: 0x05, Name: ADCRE_THRH Table 71. Bit Descriptions for ADCRE_THRH Bits Bit Name Description Reset Access [7:3] RESERVED 0x00 RW [2:0] ADCRE_THRH ADC Reset Threshold. The ADC reset triggers if more than threshold out of eight consecutive ADC samples have the full-scale value of ±8. 0x5 RW ADC Reset Pulse Length Register Address: 0x189, Reset: 0x01, Name: ADCRE_PULSE_LEN Table 72. Bit Descriptions for ADCRE_PULSE_LEN Bits Bit Name Description Reset Access [7:5] RESERVED 0x0 RW [4:0] ADCRE_PULSE_LEN The duration of the reset pulse to the ADC, (x + 1) × 8/F ADC. 0x01 RW |
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