ADC08061CIWM datasheet(10/16 Pages) NSC

10 / 16 page

Timing Diagrams (Continued)

Typical Performance Characteristics

Application Information

1.0 FUNCTIONAL DESCRIPTION

The

ADC08061

and

ADC08062

perform

8-bit

analog-to-digital conversion using a multi-step flash tech-

nique. The first flash generates the five most significant bits

(MSBs) and the second flash generates the three least sig-

nificant bits (LSBs).

Figure 6 shows the major functional

blocks of the ADC08061/2’s multi-step flash converter. It

consists of an over-encoded 21⁄2-bit Voltage Estimator, an in-

ternal DAC with two different voltage spans, a 3-bit half-flash

converter and a comparator multiplexer.

The resistor string near the center of the block diagram in

Figure 6 forms the internal main DAC. Each of the eight re-

sistors at the bottom of the string is equal to 1/256 of the total

string resistance. These resistors form the LSB Ladder and

DS011086-10

FIGURE 5. RD Mode (Pipeline Operation) (Mode Pin is Low and t

RDW must be between 200 ns and 400 ns)

CRD vs Temperature

DS011086-25

Linearity Error vs

Reference Voltage

DS011086-26

Offset Error vs

Reference Voltage

DS011086-27

Supply Current

vs Temperature

DS011086-28

Logic Threshold

vs Temperature

DS011086-29

Output Current

vs Temperature

DS011086-30

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