DP8390D datasheet(55/56 Pages) NSC

55 / 56 page

AC Timing Test Conditions

Input Pulse Levels

GND to 30V

Input Rise and Fall Times

5 ns

Input and Output Reference Levels

13V

TRI-STATE Reference Levels

Float (DV) g05V

Output Load (See Figure below)

TLF8582 – 94

Note 1

CL e 50 pF includes scope and jig capacitance

Note 2

S1 e Open for timing tests for push pull outputs

S1 e VCC for VOL test

S1 e GND for VOH test

S1 e VCC for High Impedance to active low and active low to High

Impedance measurements

S1 e GND for High Impedance to active high and active high to

High Impedance measurements

Pin Capacitance TA e 25 C f e 1 MHz

Parameter

Description

Typ

Max

Unit

CIN

Input

715

Capacitance

COUT

Output

715

Capacitance

Note

This parameter is sampled and not 100% tested

DERATING FACTOR

Output timings are measured with a purely capacitave load

for 50 pF The following correction factor can be used for

other loads

CL t 50 pf a03 nspF (for all outputs except TXE TXD

and LBK)

DP8390D Datasheet(PDF) 55 Page - National Semiconductor (TI)

DP8390D Datasheet(HTML) 55 Page - National Semiconductor (TI)

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