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WM8993 Datasheet(PDF) 49 Page - Wolfson Microelectronics plc |
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WM8993 Datasheet(HTML) 49 Page - Wolfson Microelectronics plc |
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49 / 229 page  Production Data WM8993 w PD, November 2010, Rev 4.0 49 The polarity of each ADC output signal can be changed under software control using the ADCL_DATINV and ADCR_DATINV register bits. The AIFADCL_SRC and AIFADCR_SRC register bits may be used to select which ADC is used for the left and right digital audio interface data. These register bits are described in Table 14. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R4 (04h) Audio Interface (1) 15 AIFADCL_SRC 0 Left Digital Audio interface source 0 = Left ADC data is output on left channel 1 = Right ADC data is output on left channel 14 AIFADCR_SRC 1 Right Digital Audio interface source 0 = Left ADC data is output on right channel 1 = Right ADC data is output on right channel R14 (0Eh) ADC CTRL 1 ADCL_DATINV 0 Left ADC Invert 0 = Left ADC output not inverted 1 = Left ADC output inverted 0 ADCR_DATINV 0 Right ADC Invert 0 = Right ADC output not inverted 1 = Right ADC output inverted Table 14 ADC Routing and Control The input data source for each DAC can be changed under software control using register bits AIFDACL_SRC and AIFDACR_SRC. The polarity of each DAC input may also be modified using register bits DACL_DATINV and DACR_DATINV. These register bits are described in Table 15. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R5 (05h) Audio Interface (2) 15 AIFDACL_SRC 0 Left DAC Data Source Select 0 = Left DAC outputs left interface data 1 = Left DAC outputs right interface data 14 AIFDACR_SRC 1 Right DAC Data Source Select 0 = Right DAC outputs left interface data 1 = Right DAC outputs right interface data R10 (0Ah) DAC CTRL 1 DACL_DATINV 0 Left DAC Invert 0 = Left DAC output not inverted 1 = Left DAC output inverted 0 DACR_DATINV 0 Right DAC Invert 0 = Right DAC output not inverted 1 = Right DAC output inverted Table 15 DAC Routing and Control |
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