LM93 datasheet(49/92 Pages) NSC

49 / 92 page

16.0 Registers (Continued)

16.5.5 Register 4Ch

H_P1_PROCHOT Error Status

Address

Read/

Write

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default

Value

4Ch

RWC

H_P1_PROCHOT

Error Status

PH1_ERR

TMAX

T100

T75

T50

T25

T12

00h

Bit

Name

R/W

Description

Sleep

Masking

RWC Set when P1_PROCHOT has had a throttled event. This bit is set for any

amount of PROCHOT throttling >0%.

S3, S4/5

T12

RWC Set when P1_PROCHOT has throttled greater than or equal to 0.00% but

less than 12.5%.

S3, S4/5

T25

RWC Set when P1_PROCHOT has throttled greater than or equal to 12.5% but

less than 25%.

S3, S4/5

T50

RWC Set when P1_PROCHOT has throttled greater than or equal to 25% but less

than 50%.

S3, S4/5

T75

RWC Set when P1_PROCHOT has throttled greater than or equal to 50% but less

than 75%.

S3, S4/5

T100

RWC Set when P1_PROCHOT has throttled greater than or equal to 75% but less

than 100%.

S3, S4/5

TMAX

RWC Set when P1_PROCHOT has throttled 100%.

S3, S4/5

PH1_ERR

RWC Set when P1_PROCHOT has throttled more than the user limit.

S3, S4/5

The PH1_ERR bit is the only bit in this register that will set HOST_ ERR in the LM93 Status/Control register.

LM93 Datasheet(PDF) 49 Page - National Semiconductor (TI)

LM93 Datasheet(HTML) 49 Page - National Semiconductor (TI)

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